Datasheet

Table 3. Register Address Map (continued)
REGISTER
COMMAND ADDRESS
HEX
CODE
D15 D14 D13 D12 D11 D10 D9 D8
Port 11 only (data bit D0. D7–D1 read as 0) R/W 0 1 0 1 0 1 1 0x2B
Port 12 only (data bit D0. D7–D1 read as 0) R/W 0 1 0 1 1 0 0 0x2C
Port 13 only (data bit D0. D7–D1 read as 0) R/W 0 1 0 1 1 0 1 0x2D
Port 14 only (data bit D0. D7–D1 read as 0) R/W 0 1 0 1 1 1 0 0x2E
Port 15 only (data bit D0. D7–D1 read as 0) R/W 0 1 0 1 1 1 1 0x2F
Port 16 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 0 0 0 0x30
Port 17 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 0 0 1 0x31
Port 18 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 0 1 0 0x32
Port 19 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 0 1 1 0x33
Port 20 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 1 0 0 0x34
Port 21 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 1 0 1 0x35
Port 22 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 1 1 0 0x36
Port 23 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 0 1 1 1 0x37
Port 24 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 0 0 0 0x38
Port 25 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 0 0 1 0x39
Port 26 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 0 1 0 0x3A
Port 27 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 0 1 1 0x3B
Port 28 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 1 0 0 0x3C
Port 29 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 1 0 1 0x3D
Port 30 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 1 1 0 0x3E
Port 31 only (data bit D0. D7–D1 read as 0) R/W 0 1 1 1 1 1 1 0x3F
4 ports 4–7 (data bits D0–D3. D4–D7 read as 0)) R/W 1 0 0 0 0 0 0 0x40
5 ports 4–8 (data bits D0–D4. D5–D7 read as 0) R/W 1 0 0 0 0 0 1 0x41
6 ports 4–9 (data bits D0–D5. D6–D7 read as 0) R/W 1 0 0 0 0 1 0 0x42
7 ports 4–10 (data bits D0–D6. D7 reads as 0) R/W 1 0 0 0 0 1 1 0x43
8 ports 4–11 (data bits D0–D7) R/W 1 0 0 0 1 0 0 0x44
8 ports 5–12 (data bits D0–D7) R/W 1 0 0 0 1 0 1 0x45
8 ports 6–13 (data bits D0–D7) R/W 1 0 0 0 1 1 0 0x46
8 ports 7–14 (data bits D0–D7) R/W 1 0 0 0 1 1 1 0x47
8 ports 8–15 (data bits D0–D7) R/W 1 0 0 1 0 0 0 0x48
8 ports 9–16 (data bits D0–D7) R/W 1 0 0 1 0 0 1 0x49
8 ports 10–17 (data bits D0–D7) RW 1 0 0 1 0 1 0 0x4A
8 ports 11–18 (data bits D0–D7) R/W 1 0 0 1 0 1 1 0x4B
8 ports 12–19 (data bits D0–D7) R/W 1 0 0 1 1 0 0 0x4C
8 ports 13–20 (data bits D0–D7) R/W 1 0 0 1 1 0 1 0x4D
8 ports 14–21 (data bits D0–D7) R/W 1 0 0 1 1 1 0 0x4E
8 ports 15–22 (data bits D0–D7) R/W 1 0 0 1 1 1 1 0x4F
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