Datasheet

MAX6956
simplify access to displays that overlap two MAX6956s,
the MAX6956 provides four virtual ports, P0 through P3.
To update an overlapping digit, send the same code
twice as an eight-port write, once to P28 through P35 of
the first driver, and again to P0 through P7 of the sec-
ond driver. The first driver ignores the last 4 bits and
the second driver ignores the first 4 bits.
Two addressing methods are available. Any single port
(bit) can be written (set/cleared) at once; or, any
sequence of eight ports can be written (set/cleared) in
any combination at once. There are no boundaries; it is
equally acceptable to write P0 through P7, P1 through
P8, or P31 through P38 (P32 through P38 are nonexis-
tent, so the instructions to these bits are ignored).
Using 8-bit control, a seven-segment digit with a deci-
mal point can be updated in a single byte-write, a 14-
segment digit with DP can be updated in two byte-
writes, and 16-segment digits with DP can be updated
in two byte-writes plus a bit write. Also, discrete LEDs
and GPIO port bits can be lit and controlled individually
without affecting other ports.
Shutdown
When the MAX6956 is in shutdown mode, all ports are
forced to inputs (which an be read), and the pullup cur-
rent sources are turned off. Data in the port and control
registers remain unaltered, so port configuration and
output levels are restored when the MAX6956 is taken
out of shutdown. The display driver can still be pro-
grammed while in shutdown mode. For minimum sup-
ply current in shutdown mode, logic inputs should be at
GND or V+ potential. Shutdown mode is exited by set-
ting the S bit in the configuration register (Table 8).
2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or
28-Port LED Display Driver and I/O Expander
6 _______________________________________________________________________________________
Table 1. Port Configuration Map
REGISTER DATA
REGISTER
ADDRESS
CODE (HEX)
D7 D6 D5 D4 D3 D2 D1 D0
Port Configuration for P7, P6, P5, P4 0x09 P7 P6 P5 P4
Port Configuration for P11, P10, P9, P8 0x0A P11 P10 P9 P8
Port Configuration for P15, P14, P13, P12 0x0B P15 P14 P13 P12
Port Configuration for P19, P18, P17, P16 0x0C P19 P18 P17 P16
Port Configuration for P23, P22, P21, P20 0x0D P23 P22 P21 P20
Port Configuration for P27, P26, P25, P24 0x0E P27 P26 P25 P24
Port Configuration for P31, P30, P29, P28 0x0F P31 P30 P29 P28
Table 2. Port Configuration Matrix
Note: The logic is inverted between the two output modes; a high makes the output go low in LED segment driver mode (0x00) to
turn that segment on; in GPIO output mode (0x01), a high makes the output go high.
PORT
CONFIGURATION
BIT PAIR
MODE FUNCTION
PORT
REGISTER
(
0x20–0x5F
)
PIN BEHAVIOR
ADDRESS
CODE
(
HEX
)
UPPER LOWER
Register bit = 0 High impedance
Output LED Segment Driver
Register bit = 1
Open-drain current sink, with sink
current (up to 24mA) determined
by the appropriate current register
0x09 to 0x0F 0 0
Register bit = 0 Active-low logic output
Output GPIO Output
Register bit = 1 Active-high logic output
0x09 to 0x0F 0 1
Input
GPIO Input
Without Pullup
Schmitt logic input 0x09 to 0x0F 1 0
Input GPIO Input with Pullup
Register bit =
input logic level
Schmitt logic input with pullup 0x09 to 0x0F 1 1