Datasheet

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MAX6956

The mask register contains 7 mask bits, which select

which of the seven ports P24–P30 are to be monitored

(Table 15). Set the appropriate mask bit to enable that

port for transition detect. Clear the mask bit if transitions

on that port are to be ignored. Transition detection

works regardless of whether the port being monitored is

set to input or output, but generally, it is not particularly

useful to enable transition detection for outputs.

To use transition detection, first set up the mask register

and configure port P31 as an output, as described

above. Then enable transition detection by setting the

M bit in the configuration register (Table 10). Whenever

the configuration register is written with the M bit set,

the MAX6956 updates an internal 7-bit snapshot regis-

ter, which holds the comparison copy of the logic states

of ports P24 through P30. The update action occurs

regardless of the previous state of the M bit, so that it is

not necessary to clear the M bit and then set it again to

update the snapshot register.

When the configuration register is written with the M bit

set, transition detection is enabled and remains

enabled until either the configuration register is written

2-Wire-Interfaced, 2.5V to 5.5V, 20-Port or

28-Port LED Display Driver and I/O Expander

16 ______________________________________________________________________________________

Table 7. Configuration Register Format

FUNCTION

ADDRESS CODE

(HEX)

D7 D6 D5 D4 D3 D2 D1 D0

Configuration Register 0x04 M I XXXXXS

Table 8. Shutdown Control (S Data Bit D0) Format

FUNCTION

ADDRESS CODE

(HEX)

D7 D6 D5 D4 D3 D2 D1 D0

Shutdown 0x04 M I XXXXX0

Normal Operation 0x04 M I XXXXX1

Table 10. Transition Detection Control (M-Data Bit D7) Format

FUNCTION

ADDRESS CODE

(HEX)

D7 D6 D5 D4 D3 D2 D1 D0

Disabled 0x04 0 I XXXXXS

Enabled 0x04 1 I XXXXXS

FUNCTION

ADDRESS

CODE (HEX)

D7 D6 D5 D4 D3 D2 D1 D0

Global

Constant-current limits for all digits are

controlled by one setting in the Global Current

0x04 M 0 XXXXXS

Individual Segment

Constant-current limit for each digit is

individually controlled by the settings in the

Current054 through Current1FE registers

0x04 M 1 XXXXXS

Table 9. Global Current Control (I Data Bit D6) Format