Datasheet

Table 22. Global Clear Digit Data (R Data Bit D5) Format
Table 21. Global Blink Timing Synchronization (T Data Bit D4) Format
Table 20. Digit Register Mapping with Blink Globally Enabled
Table 19. Global Blink Enable/Disable (E Data Bit D3) Format
Table 18. Blink Rate Selection (B Data Bit D2) Format
Table 17. Shutdown Control (S Data Bit
DO) Format
Table 16. Configuration Register Format
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Digit data for both planes P0 and P1 are unaffected. P I 0 T E B X S
Digit data for both planes P0 and P1 are cleared on the rising edge of CS. P I 1 T E B X S
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Blink timing counters are unaffected. P I R 0 E B X S
Blink timing counters are reset on the rising edge of CS. P I R 1 E B X S
SEGMENT’S BIT SETTING
IN PLANE P1
SEGMENT’S BIT SETTING
IN PLANE P0
SEGMENT
BEHAVIOR
0 0 Segment off.
0 1
Segment on only during the 1st half of each
blink period.
1 0
Segment on only during the 2nd half of each
blink period.
1 1 Segment on.
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Blink function is disabled. P I R T 0 B X S
Blink function is enabled. P I R T 1 B X S
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Slow blinking. Segments blink on for 1s, off for 1s with f
OSC
= 4MHz. P I R T E 0 X S
Fast blinking. Segments blink on for 0.5s, off for 0.5s with f
OSC
= 4MHz. P I R T E 1 X S
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Shutdown P I R T E B X 0
Normal
Operation
P I R T E B X 1
MODE
REGISTER DATA
D7 D6 D5 D4 D3 D2 D1 D0
Configuration
Register
P I R T E B X S
www.maximintegrated.com
Maxim Integrated │ 25
MAX6954 4-Wire Interfaced, 2.7V to 5.5V LED Display
Driver with I/O Expander and Key Scan