Datasheet

Each driver output is a slew-rate controlled CMOS push-
pull switch driving between V
BB
and GND (MAX6922)
or V
BB
and V
SS
(MAX6932/MAX6933/ MAX6934). The
output rise time is always slower than the output fall time
to avoid shoot-through currents during output transitions.
The output slew rates are slow enough to minimize EMI,
yet are fast enough so as not to impact the typical 100µs
digit multiplex period and affect the display intensity.
Initial Power-Up and Operation
An internal reset circuit clears the internal registers on
power-up. All outputs and the interface output DOUT
(MAX6922/MAX6932/MAX6934 only) initialize low regard-
less of the initial logic levels of the CLK, DIN, BLANK, and
LOAD inputs.
4-Wire Serial Interface
These driver ICs use a 4-wire serial interface with three
inputs (DIN, CLK, LOAD) and a data output (DOUT,
MAX6922/MAX6932/MAX6934 only). This interface is
used to write data to the ICs (Figure 4) (Table 1). The seri-
al interface data word length is 32 bits for the MAX6922/
MAX6934, 27 bits for the MAX6932, and 28 bits for the
MAX6933.
The functions of the four serial interface pins are:
● CLK input is the interface clock, which shifts data into
the shift register on its rising edge.
● LOAD input passes data from the shift register to the
output latch when LOAD is high (transparent latch),
and latches the data on LOAD’s falling edge.
● DIN is the interface data input, and must be stable
when it is sampled on the rising edge of CLK.
● DOUT is the interface data output, which shifts data
out from the shift register on the rising edge of CLK.
Data at DIN is propagated through the shift register
and appears at DOUT (n CLK cycles + t
DO
) later,
where n is the number of drivers in the IC.
A fifth input, BLANK, can be taken high to force the out-
puts low, without altering the contents of the output latch-
es. When the BLANK input is low, the outputs follow the
state of the output latches. A common use of the BLANK
input is PWM intensity control.
The BLANK input’s function is independent of the oper-
ation of the serial interface. Data can be shifted into the
serial interface shift register and latched regardless of the
state of BLANK.
Writing Device Registers Using
the 4-Wire Serial Interface
The MAX6922/MAX6932/MAX6933/MAX6934 are nor-
mally written using the following sequence:
1) Take CLK low.
2) Clock n bits of data in order D
n-1
first to D0 last into
DIN, observing the data setup and hold times.
3) Load the n output latches with a falling edge on
LOAD, where n is 27 for the MAX6932, 28 for the
MAX6933, and 32 for the MAX6922 and MAX6934.
LOAD may be high or low during a transmission. If LOAD
is high, then the data shifted into the shift register at
DIN appears at the OUT0 to OUT
n-1
outputs.
CLK and DIN may be used to transmit data to other
peripherals. Activity on CLK always shifts data into the
shift register. However, the output latches only update
on the rising edge of LOAD, and the last n bits of data
Figure 4. 4-Wire Serial Interface Timing Diagram
LOAD
t
CSW
t
CP
t
CSH
t
CH
t
DH
t
DO
t
DS
Dn-1 Dn-2 D1 D0
Dn-1
t
CL
CLK
DIN
DOUT
www.maximintegrated.com
Maxim Integrated │ 8
MAX6922/MAX6932/
MAX6933/MAX6934
27-, 28-, and 32-Output, 76V,
Serial-Interfaced VFD Tube Drivers