Datasheet

PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 PDIP P8-2
21-0043
—
8 CEDIP J8-2
21-0045
—
16 PDIP P16-1
21-0043
—
16 Wide SO W16-1
21-0042
—
16 CERDIP P16-1
21-0043
—
3
V
CC
WDO
CE IN
CE OUT
2
V
OUT
GND
BATT
ON
1
V
BATT
16
RESET
15
4
14
13
12
5
RESET
6
LOW LINE
7 8
OSC
IN
OSC
SEL
0.086”
(2.184 mm)
WDI
9
PFI
10 11
PFO
0.122”
(3.098 mm)
MAX690–MAX695 Microprocessor Supervisory Circuits
www.maximintegrated.com
Maxim Integrated │ 17
Chip Topography
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.