Datasheet

Layout and Bypassing
For better noise immunity, bypass each of the voltage-
detector inputs to GND with a 0.1µF capacitor installed
as close to the device as possible. Bypass V
CC
and
DBP to GND with 1µF capacitors installed as close to
the device as possible. V
CC
(when not externally sup-
plied) and DBP are internally generated voltages and
should not be used to supply power to external circuitry.
Configuration Latency Period
A delay of less than 5µs occurs between writing to the
configuration registers and the time when these
changes actually take place, except when changing
one of the voltage-detector thresholds. Changing a
voltage-detector threshold typically takes 150µs. When
changing EEPROM contents, a software reboot or
cycling of power is required for these changes to trans-
fer to volatile memory.
MAX6884/MAX6885
EEPROM-Programmable, Hex
Power-Supply Supervisory Circuits
______________________________________________________________________________________ 31
Typical Operating Circuit
MARGIN
V
CC
*AUXIN
TEMP
SENSOR
*REFIN
WDI
SCL
SDA
LOGIC OUTPUT
SCL
SDA
GND
µP
DC-DC
1
3.3V ALWAYS ON
DBP
LOGIC INPUT
LOGIC INPUT
*MAX6884 ONLY
DC-DC
2
DC-DC
3
DC-DC
4
DC-DC
5
DC-DC
6
IN1 IN2 IN3 IN4 IN5 IN6
12V
A0
MR
UV/OV
WDO
RESET RESET
R
PU
R
PU
12V
5V
3.3V
2.5V
1.8V
1.5V
1.2V
MAX6884
MAX6885