Datasheet

Configuring the MAX6884/MAX6885
The MAX6884/MAX6885 factory-default configuration
sets all registers to 00h except for bits R91h[0],
R92h[0], R93h[0], R94h[0], R95h[0], which are set to 1.
This configuration sets all three programmable outputs
(RESET, UV/OV, WDO) as open drain, and RESET and
UV/OV dependent on MR (putting all outputs into high-
impedance states until the device is reconfigured by
the user). Each device requires configuration before full
power is applied to the system. Below is a general
step-by-step procedure for programming the
MAX6884/MAX6885:
1) Apply a supply voltage to IN1–IN4 or V
CC
, depend-
ing on the programmed configuration (see the
Powering the MAX6884/MAX6885 section). The
applied voltage must be 2.7V or higher.
2) Transmit data through the serial interface. Write to
the configuration registers first to ensure the device
is configured properly (see the Write Byte and
Block Write sections).
3) Use the read word protocol to read back the data from
the configuration registers to verify the data was writ-
ten (see the Receive Byte and Block Read sections).
4) Write the same data written to the configuration reg-
isters to the appropriate configuration EEPROM reg-
isters. After completing EEPROM configuration,
apply full power to the system to begin normal oper-
ation. The nonvolatile EEPROM stores the configura-
tion information while power is off.
Software Reboot
A software reboot restores the EEPROM configuration
to the volatile registers without cycling the power sup-
plies. Use the send byte command with data byte C4h
to initiate a software reboot. The 2.5ms (max) power-up
delay also applies after a software reboot.
MAX6884/MAX6885
EEPROM-Programmable, Hex
Power-Supply Supervisory Circuits
______________________________________________________________________________________ 25
Table 12. Register Map (continued)
REGISTER
ADDRESS
EEPROM
MEMORY
ADDRESS
READ/
WRITE
DESCRIPTION
25h — R ADC Conversion Data for AUXIN (2 LSBs) (Table 3)
26h — R ADC Conversion Data for V
CC
(8 MSBs) (Table 3)
27h — R ADC Conversion Data for V
CC
(2 LSBs) (Table 3)
28h — R Fault Flags for Primary Voltage Detectors (Table 9)
29h — R Fault Flags for Secondary Voltage Detectors (Table 9)
2Ah — R Fault Flags for RESET, UV/OV, and WDO (Table 9)
REGISTER BANK
CONFIGURATION
EEPROM USER EEPROM
CONFIGURATION
DATA
(R/W)
ADC AND FAULT
REGISTERS
(READ ONLY)
00h
17h
80h 40h
7Fh
97h
18h
2Ah
Figure 5. Memory Map