Datasheet

MAX6884/MAX6885
WDO
The MAX6884/MAX6885 offer a separate output for the
watchdog timer system. WDO is active low and program-
mable for open-drain or weak pullup. Program WDO to
assert RESET when the watchdog timer expires. See the
Configuring the Watchdog Timer section for a complete
description of the watchdog timer system.
Configuring the Watchdog Timer
A watchdog timer monitors microprocessor (µP) soft-
ware execution for a stalled condition and resets the µP
if it stalls. The output of the watchdog timer (WDO) con-
nects to the reset input or a nonmaskable interrupt of
the µP. Program R15h to configure the watchdog timer
functions (see Table 8). The watchdog timer features
independent initial and normal watchdog timeout peri-
ods between 6.25ms and 102.4s (see Figure 4).
The initial watchdog timeout period (t
WDI
) is active
immediately after power-up, after a reset event takes
place, after enabling the watchdog timer, or after the
watchdog timer expires. The initial watchdog timeout
period allows the µP to perform its initialization process.
EEPROM-Programmable, Hex
Power-Supply Supervisory Circuits
20 ______________________________________________________________________________________
WDO
WDI
t
RP
*t
WDI
*t
WDI
t
WD
t
D-PO
RESET
V
CC
OR IN1–IN4
RESET NOT DEPENDENT ON WDO
2.5V
t
RP
t
RP
*t
WDI
*t
WDI
t
WD
t
D-PO
WDO CONNECTED TO MR.
WDI
V
CC
OR IN1–IN4
2.5V
*t
WDI
IS THE INITIAL WATCHDOG TIMEOUT PERIOD.
WDO
RESET
Figure 4. Watchdog Timing Diagrams