Datasheet

Detailed Description
Watchdog Input
In the MAX6814, the watchdog circuit monitors the µP’s
activity. If the µP does not toggle the watchdog input
(WDI) within t
WD
(1.6s), WDO asserts. The internal 1.6s
timer is cleared by either a WDO pulse or by toggling
WDI, which detects pulses as short as 50ns. While
WDO is asserted, the timer remains cleared and does
not count. As soon as WDO is released, the timer starts
counting (Figure 3).
Disable the watchdog function by leaving WDI uncon-
nected or by three-stating the driver connected to WDI.
The watchdog input is internally driven low during the
first 7/8 of the watchdog timeout period and high for the
last 1/8 of the watchdog timeout period. When WDI is
left unconnected, this internal driver clears the 1.6s timer
every 1.4s. When WDI is three-stated or unconnected,
the maximum allowable leakage current is 10µA and the
maximum allowable load capacitance is 200pF.
Applications Information
Watchdog Input Current
The MAX6814 WDI inputs are internally driven through
a buffer and series resistor from the watchdog counter
(Figure 1). When WDI is left unconnected, the watchdog
timer is serviced within the watchdog timeout period
by a low-high-low pulse from the counter chain. For
minimum watchdog input current (minimum overall power
consumption), leave WDI low for the majority of the
watchdog timeout period, pulsing it low-high-low once
within the first 7/8 of the watchdog timeout period to clear
the watchdog timer. If WDI is externally driven high for
the majority of the timeout period, up to 160µA can flow
into WDI.
Figure 1. Functional Diagram
MAX6814
V
CC
WDI
GND
WDO
WDO PULSE
GENERATOR
WATCHDOG
TIMER
WATCHDOG
TRANSITION
DETECTOR
UVLO
MAX6814 5-Pin Watchdog Timer Circuit
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