Datasheet

MAX6697
7-Channel Precision Temperature Monitor
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +5.5V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
CC
= +3.3V and T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SMBus INTERFACE (SCL, SDA)
Logic-Input Low Voltage V
IL
0.8 V
V
CC
= 3.0V 2.2 V
Logic-Input High Voltage V
IH
V
CC
= 5.0V 2.4 V
Input Leakage Current -1 +1 µA
Output Low Voltage V
OL
I
SINK
= 6mA 0.3 V
Input Capacitance C
IN
5pF
SMBus-COMPATIBLE TIMING (Figures 3 and 4) (Note 2)
Serial Clock Frequency f
SCL
(Note 3) 400 kHz
f
SCL
= 100kHz 4.7
Bus Free Time Between STOP
and START Condition
t
BUF
f
SCL
= 400kHz 1.6
µs
f
SCL
= 100kHz 4.7
START Condition Setup Time
f
SCL
= 400kHz 0.6
µs
90% of SCL to 90% of SDA,
f
SCL
= 100kHz
0.6
Repeat START Condition Setup
Time
t
SU:STA
90% of SCL to 90% of SDA,
f
SCL
= 400kHz
0.6
µs
START Condition Hold Time t
HD:STA
10% of SDA to 90% of SCL 0.6 µs
90% of SCL to 90% of SDA,
f
SCL
= 100kHz
4
STOP Condition Setup Time t
SU:STO
90% of SCL to 90% of SDA,
f
SCL
= 400kHz
0.6
µs
10% to 10%, f
SCL
= 100kHz 1.3
Clock Low Period t
LOW
10% to 10%, f
SCL
= 400kHz 1.3
µs
Clock High Period t
HIGH
90% to 90% 0.6 µs
f
SCL
= 100kHz 300
Data Hold Time t
HD:DAT
f
SCL
= 400kHz (Note 4) 900
ns
f
SCL
= 100kHz 250
Data Setup Time t
SU:DAT
f
SCL
= 400kHz 100
ns
f
SCL
= 100kHz 1
Receive SCL/DSA Rise Time t
R
f
SCL
= 400kHz 0.3
µs
Receive SCL/SDA Fall Time t
F
300 ns
Pulse Width of Spike Suppressed t
SP
050ns
SMBus Timeout t
TIMEOUT
SDA low period for interface reset 25 37 45 ms
Note 1: All parameters are tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2: Timing specifications are guaranteed by design.
Note 3: The serial interface resets when SCL is low for more than t
TIMEOUT
.
Note 4: A transition must internally provide at least a hold time to bridge the undefined region (300ns max) of SCL’s falling edge.