Datasheet
MAX6469–MAX6484
300mA LDO Linear Regulators with Internal
Microprocessor Reset Circuit
12 ______________________________________________________________________________________
Power Dissipation Consideration
For the SOT23 package, any pin except the SET pin
can be used as a heatsink. If the SET pin is used as a
heatsink, excessive parasitic capacitance can affect
stability. For the TDFN package, the exposed metal
pad on the back side of a package connects to GND of
the chip. This metal pad can be used as a heatsink.
UCSP Consideration
For general UCSP package information and PC layout
considerations, refer to Maxim Application Note:
Wafer-
Level Chip-Scale Package
.
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that might not perform equally to
a packaged product through traditional mechanical
reliability tests. CSP reliability is integrally linked to the
user’s assembly methods, circuit-board material, and
usage environment. The user should closely review
these areas when considering a CSP package.
Performance through operating life test and moisture
resistance remains uncompromised, because it is pri-
marily determined by the wafer-fabrication process.
Mechanical stress performance is a greater considera-
tion for a CSP package. CSPs are attached through
direct solder contact to the user’s PC board, forgoing
the inherent stress relief of a packaged product’s lead
frame. Solder-joint contact integrity must be considered.
Information on Maxim’s qualification plan, test data, and
recommendations are detailed in the UCSP application
note on Maxim’s website at www.maxim-ic.com.
SUFFIX
OUTPUT
VOLTAGE (V)
15 1.5
16 1.6
17 1.7
18 1.8
19 1.9
20 2.0
21 2.1
22 2.2
23 2.3
24 2.4
25 2.5
26 2.6
27 2.7
28 2.8
285 2.85
29 2.9
30 3.0
31 3.1
32 3.2
33 3.3
Table 1. Output Voltage Suffix Guide
Note: Factory-trimmed custom output voltages may be avail-
able; contact factory for availability.
SUFFIX
V
OUT
RESET
TOLERANCE (%)
A-7.5
B -12.5
Table 2. Reset Threshold Accuracy Guide
SUFFIX
MINIMUM RESET
TIMEOUT PERIOD (ms)
D1 2.5
D2 20
D3 150
D4 1200
Table 3. Reset Timeout Delay Guide