Datasheet

Detailed Description
Reset Output
The reset output is typically connected to the reset input of
a µP. A µP’s reset input starts or restarts the µP in a known
state. The MAX6340/MAX6421–MAX6426 µP superviso-
ry circuits provide the reset logic to prevent code-execu-
tion errors during power-up, power-down, and brownout
conditions (see Typical Operating Characteristics).
RESET changes from high to low whenever V
CC
drops
below the threshold voltage. Once V
CC
exceeds the
threshold voltage, RESET remains low for the capaci-
tor-adjustable reset timeout period.
The MAX6422 active-high RESET output is the inverse
logic of the active-low RESET output. All device outputs
are guaranteed valid for V
CC
> 1V.
The MAX6340/MAX6423/MAX6425/MAX6426 are open-
drain RESET outputs. Connect an external pullup resistor
to any supply from 0 to 5.5V. Select a resistor value large
enough to register a logic low when RESET is asserted
and small enough to register a logic high while supply-
ing all input current and leakage paths connected to the
RESET line. A 10k to 100k pullup is sufficient in most
applications.
Selecting a Reset Capacitor
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (t
RP
) by connecting a capacitor (C
SRT
) between
SRT and ground. Calculate the reset timeout capacitor
as follows:
Figure 1. MAX6340/MAX6423/MAX6425/MAX6426 Open-Drain
RESET Output Allows Use with Multiple Supplies
PIN
NAME FUNCTIONMAX6340
MAX6421
MAX6422
MAX6423
MAX6424
MAX6425
MAX6426
SOT23 SOT143 SC70 SOT23 SOT23
1 3 3 5 1 SRT
Set Reset Timeout Input. Connect a capacitor between
SRT and ground to set the timeout period. Determine the
period as follows: t
RP
= 2.73 × 10
6
× C
SRT
+ 275µs with
t
RP
in seconds and C
SRT
in farads
2 1 2 3 2, 3 GND Ground
3 4 N.C. Not Internally Connected. Can be connected to GND
4 2 1 2 5 V
CC
Supply Voltage and Reset Threshold Monitor Input
5
4 4
1 4 RESET
RESET changes from high to low whenever V
CC
drops
below the selected reset threshold voltage. RESET
remains low for the reset timeout period after V
CC
exceeds
the reset threshold
RESET
RESET changes from low to high whenever V
CC
drops
below the selected reset threshold voltage. RESET
remains high for the reset timeout period after V
CC
exceeds the reset threshold
MAX6340
MAX6423
MAX6425
MAX6426
V
REF
C
SRT
SRT
RESET
TIMEOUT
N
GND
RESET
LASER-TRIMMED
RESISTORS
V
CC
3.3V
10k
5.0V
5V
SYSTEM
www.maximintegrated.com
Maxim Integrated
4
MAX6340/MAX6421–
MAX6426
Low-Power, SC70/SOT µP Reset Circuits
with Capacitor-Adjustable Reset Timeout Delay
Pin Description