Datasheet
MAX5986A–MAX5986C/MAX5987A
IEEE 802.3af-Compliant, High-Efficiency, Class 1/
Class 2, PDs with Integrated DC-DC Converter
15Maxim Integrated
Frequency Foldback Protection for
High-Efficiency Light-Load Operation
The devices enter frequency foldback mode when
eight consecutive inductor current zero-crossings occur.
The switching frequency is 215kHz or 430kHz under
loads large enough that the inductor current does not
cross zero. In frequency foldback mode, the switching
frequency is reduced to 107.5kHz or 215kHz to increase
power conversion efficiency. The device returns to
normal mode when the inductor current does not cross
zero for eight consecutive switching periods. Frequency
foldback mode is forced during startup until 50% of the
soft-start is completed.
Hiccup Mode
The devices include a hiccup protection feature. When
hiccup protection is triggered, the devices turn off the
high-side and turn on the low-side MOSFET until the
inductor current reaches the valley current limit. The
control logic waits 154ms (77ms for the MAX5986C) until
attempting a new soft-start sequence. Hiccup mode is
triggered if the current in the high-side MOSFET exceeds
the runaway current-limit threshold, both during soft-start
and during normal operating mode. Hiccup mode can
also be triggered in normal operating mode in the case
of an output undervoltage event. This happens if the
regulated feedback voltage drops below 60% (typ).
RESET Output (MAX5987A)
The MAX5987A features an open-drain RESET output
that indicates if either the LDO or the switching regula-
tor drop out of regulation. The RESET output goes low if
either regulator drops below 92% of its regulated feed-
back value. RESET goes high impedance 100µs after
both regulators are above 95% of their value.
Maintain Power Signature (MPS)
The devices feature the MPS to comply to the
IEEE 802.3af standard. They are able to maintain a
minimum current (10mA) of the port to avoid the power
disconnection from the PSE. The devices enter the MPS
when the port current is lower than 14mA and also exit
the MPS mode when the port current is geater than
40mA. The feature is enabled by connecting the MPS
pin to VDRV, or disagbled by connecting the MPS pin
to GND.
Applications Information
Operation with Wall Adapter
For applications where an auxiliary power source such
as a wall power adapter is used to power the PD, the
devices feature wall power adapter detection. The device
gives priority to the WAD supply over V
DD
supply, and
smoothly switches the power supply to WAD when it is
detected. The wall power adapter is connected from
WAD to PGND. The devices detect the wall power adapt-
er when the voltage from WAD to PGND is greater than
8.8V. When a wall power adapter is detected, the internal
isolation MOSFET is turned off, classification current is
disabled and the device draws power from the auxiliary
power source through V
CC
. Connect the auxiliary power
source to WAD, connect a diode from WAD to V
CC
. See
the typical application circuit in Figure 2.
Adjusting LDO Output Voltage (MAX5987A)
An uncommitted LDO regulator is available to provide
a supply voltage to external circuits. A preset voltage
of 3.3V is set by connecting LDO_FB directly to VDRV.
For different output voltages connect a resistor divider
from LDO_OUT and LDO_FB to GND. The total feedback
resistance should be in the range of 100kω. The maxi-
mum output current is 85mA and thermal considerations
must be taken to prevent triggering thermal shutdown.
The LDO regulator can be powered by VOUT, a differ-
ent power supply, or grounded when not used. The LDO
is enabled once the buck converter has reached the
regulation voltage. The LDO is disabled when the buck
converter is turned off or not regulating.
Adjusting Buck Converter Output Voltage
The buck converter output voltage is set by changing
the feedback resistor-divider ratio. The output voltage
can be set from 3.0V to 5.6V (MAX5986A/MAX5987A) or
5.4V to 14V (MAX5986B/MAX5986C). The FB voltage is
regulated to 1.225V. Keep the trace from the FB pin to
the center of the resistive divider short, and keep the total
feedback resistance around 100kω.