Datasheet

19Maxim Integrated
Active-Clamped, Spread-Spectrum,
Current-Mode PWM Controllers
MAX5974A/MAX5974B/MAX5974C/MAX5974D
n-Channel MOSFET Gate Driver
The NDRV output drives an external n-channel MOSFET.
NDRV can source/sink in excess of 650mA/1000mA
peak current; therefore, select a MOSFET that yields
acceptable conduction and switching losses. The exter-
nal MOSFET used must be able to withstand the maxi-
mum clamp voltage.
p-Channel MOSFET Gate Driver
The AUXDRV output drives an external p-channel
MOSFET with the aid of a level shifter. The level shifter
consists of C
AUX
, R
AUX
, and D5 as shown in the Typical
Application Circuits. When AUXDRV is high, C
AUX
is
recharged through D5. When AUXDRV is low, the gate
of the p-channel MOSFET is pulled below the source by
the voltage stored on C
AUX
, turning on the pFET.
Add a zener diode between gate to source of the exter-
nal n-channel and p-channel MOSFETs after the gate
resistors to protect V
GS
from rising above its absolute
maximum rating during transient condition (see the
Typical Application Circuits).
Dead Time
Dead time between the main and AUX output edges allow
ZVS to occur, minimizing conduction losses and improv-
ing efficiency. The dead time (t
DT
) is applied to both
leading and trailing edges of the main and AUX outputs
as shown in Figure 5. Connect a resistor between DT and
GND to set t
DT
to any value between 40ns and 400ns:
DT DT
10k
Rt
40ns
Ω
= ×
Oscillator/Switching Frequency
The ICs’ switching frequency is programmable between
100kHz and 600kHz with a resistor R
RT
connected
between RT and GND. Use the following formula to
determine the appropriate value of R
RT
needed to gen-
erate the desired output-switching frequency (f
SW
):
9
RT
SW
8.7 10
R
f
×
=
where f
SW
is the desired switching frequency.
Figure 5. Dead Time Between AUXDRV and NDRV
BLANKING, t
BLK
NDRV
AUXDRV
DEAD TIME, t
DT