Datasheet

MAX5965A/MAX5965B
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
______________________________________________________________________________________ 53
Typical Operating Circuits (continued)
MAX5965B
-48V
GATE_
INTERNAL PULLDOWN
(MANUAL MODE)
100
-48VRTN
FDT3612
100V, 120m
SOT-223
SENSE_
V
EE
OUT_
OFF
ON
DET_
SDAIN
SDAOUT
SCL
DGND
V
DD
A0
A1
A2
A3
OSC
AUTO
MIDSPAN
AGND
INTERNAL PULLDOWN
(SIGNAL MODE)
0.5
1%
-48V
OUTPUT TO
PORT
-48V RTN
OUTPUT TO PORT
NOTE: ALL SIGNAL PINS ARE REFERENCED TO DGND.
1N4448
1k
1 OF 4 CHANNELS
1.8V TO 3.7V,
(REF TO DGND)
INT
RESET
3k
3k
180
180
180
OPTIONAL BUFFER
INTERNAL
50k PULLUP
4.7k
1k
V
DD
1N4002
CAN BE UP TO 100k
HPCL063L
OPTIONAL BUFFER
OPTIONAL BUFFER
HPCL063L
HPCL063L
VCCRTN
V
CC
(3.3V)
SCL
SDA
SERIAL INTERFACE
3k
3k
ISOLATION
DGND MUST BE CONNECTED DIRECTLY TO AGND
FOR AC DISCONNECT DETECTION CIRCUIT TO OPERATE.
0.47µF
100V
SHD_
SINE WAVE
100Hz ±10%
PEAK AMPLITUDE 2.2V ±0.1V
VALLEY AMPLITUDE 0.2V ±0.1V
Typical Operating Circuit 3 (with AC Load Removal Detection)
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages
. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE NO.
LAND
PATTERN NO.
36 SSOP A36+4
21-0040
90-0096