Datasheet

MAX5965A/MAX5965B
High-Power, Quad, Monolithic, PSE Controllers
for Power over Ethernet
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Table 30. Miscellaneous Configurations 2
ADDRESS = 29h
SYMBOL BIT R/W
DESCRIPTION
7 — Reserved
6 — Reserved
5 — Reserved
4 — Reserved
Reserved
3 — Reserved
LSC_EN 2 — LSC_EN
1 R/W IVEE[1]
IVEE
0 R/W IVEE[0]
Table 31. Current-Limit Scaling Register
IVEE[1:0]
(ADDRESS = 29h)
CURRENT LIMIT
(%)
00 Default
01 -5
10 -10
11 -15
Table 29. High-Power Mode Register
ADDRESS = 24h
SYMBOL BIT R/W
DESCRIPTION
Reserved 7 — Reserved
6 R/W HP[2]
5 R/W HP[1]
HP
4 R/W HP[0]
3 — Reserved
2 — Reserved
1 — Reserved
Reserved
0 — Reserved
HP[2:0] programs the default power setting that is writ-
ten upon the discovery of a class 4, 5, or 6 PD. A reset
or power-up sets R24h = 00h.
The IVEE bits enable the current-limit scaling (Table
30). This feature is used to reduce the current limit for
systems running at higher voltage to maintain the
desired output power. Table 31 sets the current-limit
scaling register. A reset or power-up sets R29h = 00h.