Datasheet

MAX5934/MAX5934A
Positive High-Voltage, Hot-Swap Controllers with
Selectable Fault Management and Status Polarity
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Pin Description
PIN NAME FUNCTION
1
LATCH/
RETRY
Circuit-Breaker Fault-Management Select Input. Connect LATCH/RETRY to GND to latch off after a circuit-
breaker fault. Leave LATCH/RETRY open or drive to logic-high voltage for automatic restart after a circuit-
breaker fault.
2ON
On/Off Control Input. ON implements the undervoltage-lockout threshold and resets the part after a fault
latch (see the Fault Management (
LATCH /RETRY) section).
3 POL_SEL
PWRGD_ Polarity Select Input. Leave POL_SEL open or drive to logic-high voltage for PWRGD_ asserted
high. Connect POL_SEL to GND for PWRGD_ asserted low.
4 FB1
Power-Good Comparator Input. Connect a resistive divider between output, FB1, and GND to monitor the
output voltage (see the Power-Good (PWRGD_ ) Detection section). FB1 is also used as feedback for the
current-limit foldback function.
5 PWRGD2
Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD2. PWRGD2 is
asserted when FB2 is higher than V
FB2H
. PWRGD2 deasserts when FB2 is lower than V
FB2L
(see the
Power-Good (PWRGD_) Detection section).
6 PWRGD1
Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD1. PWRGD1 is
asserted when FB1 is higher than V
FB1H
. PWRGD1 deasserts when FB1 is lower than V
FB1L
(see the
Power-Good (PWRGD_) Detection section).
7 PWRGD3
Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD3. PWRGD3 asserts
when GATE is at maximum voltage. PWRGD3 deasserts after the timeout following an overcurrent event
(see the Power-Good (PWRGD_) Detection section).
8 GND Ground
9 OUT Output Voltage. OUT is used as the return path for the internal GATE protection clamping circuitry.
10 TIMER
Timing Input. Connect a capacitor from TIMER to GND to program the maximum time the part is allowed to
remain in current limit (see the TIMER section).
11 GATE Gate-Drive Output. The high-side gate drive for the external n-channel MOSFET (see the GATE section).
12 FB2
Noninverting Comparator Input. FB2 is used to monitor any other voltage in the system. When FB2 rises
higher than V
FB2H
, PWRGD2 asserts. When FB2 drops below V
FB2L
, PWRGD2 deasserts.
13 N.C. No Connection. Not internally connected.
14 SENSE
Current-Sense Input. Connect a sense resistor from V
CC
to SENSE and the drain of the external n-channel
MOSFET.
15 DC
Duty-Cycle Select. When DC is floating, the default duty cycle is 3.75%. Connect DC to V
CC
to set the duty
cycle to 1.88%. Connect DC to GND to set the duty cycle to 0.94%.
16 V
CC
Power-Supply Input. Bypass V
CC
to GND with a 0.1µF capacitor. The input voltage range is from +9V to
+80V for the MAX5934A and +33V to +80V for the MAX5934.