Datasheet

MAX5854
Dual, 10-Bit, 165Msps, Current-Output DAC
14 ______________________________________________________________________________________
CLKXN
CLKXP
CLK
OUTPUT
CW
DA0–DA9
OUTPA
OUTNA
DB0–DB9
OUTPB
OUTNB
DACA - 1
DACB - 1
DACA
DACB
DACA + 1
DACB + 1
DACA + 2
DACB + 2
CONTROL
WORD
XXXX
DACA + 3
DACB + 3
DACA - 1
DACB - 1
DACA
DACB
DACA + 1
DACB + 1
DACA + 2
DACB + 2
XXXX
(CONTROL WORD DATA)
XXXX
DACA + 3
DACB + 3
t
CXH
t
CXL
t
CDH
t
CDL
t
DCS
t
DCH
t
DCS
t
DCH
t
CWL
t
CS
t
CW
Figure 5. Timing Diagram for Noninterleaved Data Mode (IDE = 0)
CLKXN
CLKXP
CLK
OUTPUT
CW
DA0–DA9
OUTPA
OUTNA
OUTPB
OUTNB
t
CXL
t
CXH
t
CDH
t
CDL
t
DCS
t
DCH
t
DCS
t
DCH
t
CS
t
CW
t
CWL
DACA DACB + 1 DACA + 1
CONTROL
WORD
DACB + 2 DACA + 2
DACA - 1
DACB - 1
DACA
DACB
DACA + 1
DACB + 1
Figure 6. Timing Diagram for Interleaved Data Mode (IDE = 1)