Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) TQFN 40 EP

Detailed Description

The MAX5854 dual, high-speed, 10-bit, current-output

DAC provides superior performance in communication

systems requiring low-distortion analog-signal recon-

struction. The MAX5854 combines two DACs and an on-

chip 1.24V reference (Figure 2). The current outputs of

the DACs can be configured for differential or single-

ended operation. The full-scale output current range is

adjustable from 2mA to 20mA to optimize power dissipa-

tion and gain control.

The MAX5854 accepts an input data and a DAC con-

version rate of 165MHz. The inputs are latched on the

rising edge of the clock whereas the output latches on

the following rising edge.

The MAX5854 features three modes of operation: normal,

standby, and power-down (Table 2). These modes allow

efficient power management. In power-down, the

MAX5854 consumes only 1µA of supply current. Wake-up

time from standby mode to normal DAC operation is 3µs.

Programming the DAC

An 8-bit control word routed through channel A’s data

port programs the gain matching, reference, and the

operational mode of the MAX5854. The control word is

latched on the rising edge of CW. CW is independent

of the DAC clock. The DAC clock can always remain

running, when the control word is written to the DAC.

Table 1 and Table 2 represent the control word format

and function.

The gain on channel A can be adjusted to achieve gain

matching between two channels in a user’s system.

The gain on channel A can be adjusted from -0.4dB to

0.35dB in steps of 0.05dB by using bits G3 to G0 (see

Table 3).

MAX5854

Dual, 10-Bit, 165Msps, Current-Output DAC

______________________________________________________________________________________ 11

Pin Description (continued)

PIN NAME FUNCTION

32 REFR

Full-Scale Current Adjustment. To set the output full-scale current, connect an external resistor RSET

between REFR and AGND. The output full-scale current is equal to 32 x V

REFO

SET

33, 39 AV

Anal og P ow er Inp ut. S ee the P ow er S up p l i es, Byp assi ng , D ecoup l i ng , and Layout secti on for m or e d etai l s.

34 OUTNB Channel B Negative Analog Current Output

35 OUTPB Channel B Positive Analog Current Output

36, 40 AGND Analog Ground

37 OUTNA Channel A Negative Analog Current Output

38 OUTPA Channel A Positive Analog Current Output

— EP Exposed Paddle. Connect EP to the common point of all ground planes.

10-BIT

DACA

CHANNEL A

GAIN

CONTROL

DA0

DA1

DA2/G0

DA3/G1

DA4/G2

DA5/G3

DA6/REN

DA7/IDE

DA8/DACEN

DA9/PD

DACA INPUT REGISTER

DB0

DB1

DB2

DB3

DB4

DB5

DB6

DB7

DB8

DB9

DACB INPUT REGISTER

CONTROL WORD

OPERATING

MODE

CONTROLLER

DACEN

INPUT DATA

INTERLEAVER

10-BIT

DACB

CLOCK

DISTRIBUTION

1.24V REFERENCE

AND CONTROL

AMPLIFIER

CLOCK

POWER

MANAGEMENT

DCE

CLKXP

CLKXN

CLK

DIGITAL

POWER

MANAGEMENT

ANALOG

POWER

MANAGEMENT

MAX5854

DGND

CGND

IDE

REN

REFR

REFO

SET

AGND

OUTNB

OUTPB

OUTNA

OUTPA

AGND

Figure 2. Simplified Diagram