Datasheet

MAX5823/MAX5824/MAX5825
Ultra-Small, Octal Channel, 8-/10-/12-Bit Buffered
Output DACs with Internal Reference and I
2
C Interface
14Maxim Integrated
Pin Description
Pin Configurations
PIN
NAME FUNCTION
TSSOP WLP
1 D3 REF Reference Voltage Input/Output
2 D2 OUT0 DAC Channel 0 Voltage Output
3 D1 OUT1 DAC Channel 1 Voltage Output
4 C1 OUT2 DAC Channel 2 Voltage Output
5 C2 OUT3 DAC Channel 3 Voltage Output
6 B2 OUT4 DAC Channel 4 Voltage Output
7 B1 OUT5 DAC Channel 5 Voltage Output
8 A1 OUT6 DAC Channel 6 Voltage Output
9 A2 OUT7 DAC Channel 7 Voltage Output
10 B3 V
DD
Analog Supply Voltage
11 A3 V
DDIO
Digital Supply Voltage
12 A4 ADDR1 I
2
C Address Selection Input Bit 1
13 A5 ADDR0 I
2
C Address Selection Input Bit 0
14 B5 SCL I
2
C Serial Data Clock Input
15 B4 SDA I
2
C Serial Data Bus Input/Output
16 C5 IRQ Active-Low Open Drain Interrupt Output. IRQ low indicates watchdog timeout.
17 C4 CLR Active-Low Asynchronous DAC Clear Input
18 D5 LDAC Active-Low Asynchronous DAC Load Input
19 D4 GND Ground
20 C3 M/Z
DAC Output Reset Selection. Connect M/Z to GND for zero-scale and connect M/Z to
V
DD
for midscale.
20
19
18
17
16
15
14
1
2
3
4
5
6
7
M/Z
GND
LDAC
CLROUT2
OUT1
OUT0
REF
TOP VIEW
MAX5823
MAX5824
MAX5825
IRQ
SDA
SCLOUT5
OUT4
OUT3
13
12
11
8
9
10
ADDR0
ADDR1
V
DDIO
V
DD
OUT7
OUT6
TSSOP
+
TOP VIEW
CLROUT2
SDAOUT5
ADDR1OUT6
MAX5823/MAX5824/MAX5825
+
1 2 34
A
OUT3 M/Z
OUT4 V
DD
OUT7 V
DDIO
B
C
WLP
D
IRQ
SCL
ADDR0
5
GNDOUT1 OUT0 REF LDAC