Datasheet

MAX5590–MAX5595
Buffered, Fast-Settling, Octal, 12/10/8-Bit,
Voltage-Output DACs
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Table 20. UPIO Programming Example
DATA CONTROL BITS DATA BITS
DIN10110110010000XX
X = Don’t care.
Table 21. UPIO Read Command
DATA CONTROL BITS DATA BITS
DIN10110111XXXXXXXX
DOUTRB X X XXXXXXU P 3- 2U P 2- 2U P 1- 2U P 0- 2U P 3- 1U P 2- 1U P 1- 1U P 0- 1
X = Don’t care.
UPIO Bits (UPSL1, UPSL2, UP0–UP3)
The MAX5590–MAX5595 provide two user-programma-
ble input/output (UPIO) ports: UPIO1 and UPIO2. These
ports have 15 possible configurations, as shown in
Table 22. UPIO1 and UPIO2 can be programmed inde-
pendently or simultaneously by writing to the UPSL1,
UPSL2, and UP0–UP3 bits (Table 18).
Table 19 shows how UPIO1 and UPIO2 are selected for
configuration. The UP0–UP3 bits select the desired
functions for UPIO1 and/or UPIO2 (Table 22).
UPIO Programming Example:
To set only UPIO1 as LDAC and leave UPIO2
unchanged, use the command in Table 20.
The UPIO selection and configuration bits can be read
back from the MAX5590–MAX5595 when UPIO1 or
UPIO2 is configured as a DOUTRB output. Table 21
shows the read-back data format for the UPIO bits.
Writing the command in Table 21 initiates a read opera-
tion of the UPIO bits. The data is clocked out starting on
the ninth clock cycle of the sequence. Bits UP3-2
through UP0-2 provide the UP3–UP0 configuration bits
for UPIO2 (Table 22), and bits UP3-1 through UP0-1
provide the UP3–UP0 configuration bits for UPIO1.
Table 18. UPIO Write Command
DATA CONTROL BITS DATA BITS
DIN10110110U P S L2 U P S L1 UP3 UP2 UP1 UP0 X X
X = Don’t care.
Table 19. UPIO Selection Bits (UPSL1 and UPSL2)
UPSL2 UPSL1 UPIO PORT SELECTED
0 0 None selected
0 1 UPIO1 selected
1 0 UPIO2 selected
1 1 Both UPIO1 and UPIO2 selected