Datasheet

MAX5590–MAX5595
Buffered, Fast-Settling, Octal, 12/10/8-Bit,
Voltage-Output DACs
______________________________________________________________________________________ 17
Table 1. Serial Write Data Format
MSB 16 BITS OF SERIAL DATA
LSB
CONTROL BITS DATA BITS
C3
C2 C1 C0 D11 D10
D9 D8 D7 D6
D5
D4 D3 D2 D1 D0
Figure 1. Serial-Interface Timing Diagram (DSP Mode Disabled)
Figure 2. Serial-Interface Timing Diagram (DSP Mode Enabled)
SCLK
DIN
CS
DOUTDC1*
DOUTDC0
OR
DOUTRB*
*UPIO1/UPIO2 CONFIGURED AS DOUTDC_ (DAISY-CHAIN DATA OUTPUT, MODE 0 OR 1) OR DOUTRB (READ-BACK DATA OUTPUT).
SEE THE DATA OUTPUT (DOUTRB, DOUTDC0, DOUTDC1) SECTION FOR DETAILS.
t
CH
t
DS
t
CS0
t
DH
t
CSH
t
DO1
t
DO2
t
CL
t
CSW
t
CS1
DOUT VALID
DOUT VALID
t
CSS
C1 D0C2C3
SCLK
DIN
CS
DSP
DOUTDC0*
DOUTDC1
OR
DOUTRB*
*UPIO1/UPIO2 CONFIGURED AS DOUTDC_ (DAISY-CHAIN DATA OUTPUT, MODE 0 OR 1) OR DOUTRB (READ-BACK DATA OUTPUT).
SEE THE DATA OUTPUT (DOUTRB, DOUTDC0, DOUTDC1) SECTION FOR DETAILS.
t
CL
t
DS
t
CCS
t
DSW
t
DSPWL
t
D02
t
D01
t
DH
t
CS0
t
CH
C3 C2 C1 D0
t
CSH
t
CSW
t
DSS
t
CS1
t
DS0
DOUT VALID
DOUT VALID