Datasheet

MAX5580–MAX5585

Buffered, Fast-Settling, Quad,

12-/10-/8-Bit, Voltage-Output DACs

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Pin Description

MAX5580

MAX5582

MAX5584

MAX5581

MAX5583

MAX5585

NAME FUNCTION

1 1 AGND Analog Ground

22AV

Analog Supply

3, 5, 17, 19 — N.C. No Connection. Not internally connected.

— 3 FBB Feedback for DACB

4 4 OUTB DACB Output

— 5 FBA Feedback for DACA

6 6 OUTA DACA Output

77PU

Power-Up State Select Input. Connect PU to DV

to set OUT_ to full scale upon power-up.

Connect PU to DGND to set OUT_

to zero scale upon power-up. Float PU to set OUT_ to midscale upon power-up.

88CS Active-Low Chip-Select Input

9 9 SCLK Serial Clock Input

10 10 DIN Serial Data Input

11 11 UPIO1 User-Programmable Input/Output 1

12 12 UPIO2 User-Programmable Input/Output 2

13 13 DV

Digital Supply

14 14 DGND Digital Ground

15 15 DSP

Clock Enable. Connect DSP to DV

to clock in data on the rising edge of SCLK. Connect

DSP to DGND to clock in data

on the falling edge of SCLK.

16 16 OUTD DACD Output

— 17 FBD Feedback for DACD

18 18 OUTC DACC Output

— 19 FBC Feedback for DACC

20 20 REF Reference Input

— — EP Exposed Pad. Connect to AGND.