Datasheet

Layout Considerations
Digital and AC transient signals coupling to GND can
create noise at the output. Use proper grounding tech-
niques, such as a multilayer board with a low-inductance
ground plane. Wire-wrapped boards and sockets are not
recommended. For optimum system performance, use
printed circuit (PC) boards. Good PC board ground lay-
out minimizes crosstalk between DAC outputs, reference
inputs, and digital inputs. Reduce crosstalk by keeping
analog lines away from digital lines.
MAX5522–MAX5525
Dual, Ultra-Low-Power,
10-Bit, Voltage-Output DACs
______________________________________________________________________________________ 19
REFIN
1/2 MAX5524
OUT_
V
OUT
FB_
V+
10kΩ 10kΩ
V-
DAC
Figure 7. Bipolar Output Circuit
N
DACA
IS THE NUMERIC VALUE
OF THE DAC A INPUT CODE.
REFIN
DAC
V
OUT1
V
OUT1
=
V
REFIN
× N
DACA
1024
(
1 +
R2
)
R1
N
DACB
IS THE NUMERIC VALUE
OF THE DAC B INPUT CODE.
V
OUT2
=
V
REFIN
× N
DACB
1024
VOUTA
1/2 MAX5524
FBA
DAC
V
OUT2
VOUTB
FBB
R2
R1
Figure 8. Separate Force-Sense Outputs Create Unity and
Greater-than-Unity DAC Gains Using the Same Reference
H
L
FB
W
N
DAC
IS THE NUMERIC VALUE OF THE DAC INPUT CODE.
N
POT
IS THE NUMERIC VALUE OF THE POT INPUT CODE.
REFIN
1/2 MAX5524
MAX5401
SOT-POT
100kΩ
DAC
VOUT
5PPM/°C
RATIOMETRIC
TEMPCO
1.8V ≤ V
DD
≤ 5.5V
V
OUT
V
OUT
=
V
REFIN
× N
DAC
1024
(
1 +
255 - N
POT
)
255
SCLK
DIN
CS2
CS1
Figure 9. Software-Configurable Output Gain
DAC
BAND
GAP
TO ADC
OUT
REFOUT
REF
1/2 MAX5525
TO ADC
TO ADC
FB
WE
SENSOR
CE
I
F
R
F
C
L
Figure 10. Self-Biased Two-Electrode Potentiostat Application