Datasheet

MAX5512–MAX5515
Dual, Ultra-Low-Power,
8-Bit, Voltage-Output DACs
14 ______________________________________________________________________________________
t
CSW
t
CSS
t
CS0
t
DH
t
CL
t
CS1
t
CSH
t
CH
t
DS
SCLK
DIN
CS
C2
C1 S0
C3
Figure 1. Timing Diagram
16151413121110987654321SCLK
C3 C2 C1 C0 D7 D6 D5 D4 D3 D2 D1 D0 S3 S2 S1 S0DIN
CONTROL BITS DATA BITS SUB-BITS
COMMAND
EXECUTED
CS
Figure 2. Register Loading Diagram
Table 1. Serial Write Data Format
Sub-bits S3 to S0 must be set to zero for proper operation.
CONTROL DATA BITS
MSB LSB
C3 C2 C1 C0 D7 D6 D5 D4 D3 D2 D1 D0 S3 S2 S1 S0