Datasheet

(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
Note 2: All devices are production tested at T
A
= +25°C and are guaranteed by design and characterization for T
A
= -40°C to
+125°C.
Note 3: DNL and INL are measured with the potentiometer configured as a voltage-divider with V
H
= 5.25V (QP enabled) or V
DD
(QP disabled) and V
L
= GND. The wiper terminal is unloaded and measured with an ideal voltmeter.
Note 4: R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure 1). H is unconnected and
L = GND.
For charge pump enabled, V
DD
= 1.7V to 5.5V, the wiper terminal is driven with a source current of 400μA for the 10kΩ
configuration, 80μA for the 50kΩ configuration, and 40μA for the 100kΩ configuration.
For charge pump disabled and V
DD
= 5.5V, the wiper terminal is driven with a source current of 400μA for the 10kΩ
configuration, 80μA for the 50kΩ configuration, and 40μA for the 100kΩ configuration.
For charge pump disabled and V
DD
= 2.6V, the wiper terminal is driven with a source current of 200μA for the 10kΩ
configuration, 40μA for the 50kΩ configuration, and 20μA for the 100kΩ configuration.
Note 5: The wiper resistance is the maximum value measured by injecting the currents given in Note 4 into W with L = GND.
R
W
= (V
W
- V
H
)/I
W
.
Note 6: Measured at W with H driven with a 1kHz, 0V to V
DD
amplitude tone and V
L
= GND. Wiper at midscale with a 10pF load.
Note 7: Wiper-settling time is the worst-case 0-to-50% rise time, measured between tap 0 and tap 127. H = V
DD
, L = GND, and
the wiper terminal is loaded with 10pF capacitance to ground.
Note 8: Digital Inputs at V
DD
or GND.
Note 9: An unconnected condition on the ADDR0 pin is sensed via a pullup and pulldown operation. For proper operation, the
ADDR0 pin should be tied to V
DD
, GND, or left unconnected with minimal capacitance.
Note 10: Digital timing is guaranteed by design and characterization, and is not production tested.
Figure 1. Voltage-Divider and Variable Resistor Configurations
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Hold Time for START Condition t
HD:STA
0.6 µs
SCL High Time t
HIGH
0.6 µs
SCL Low Time t
LOW
1.3 µs
Data Setup Time t
SU:DAT
100 ns
Data Hold Time t
HD:DAT
0 µs
SDA, SCL Rise Time t
R
0.3 µs
SDA, SCL Fall Time t
F
0.3 µs
Setup Time for STOP Conditions t
SU:STO
0.6 µs
Bus Free Time Between STOP
and START Conditions
t
BUF
1.3 µs
Pulse-Suppressed Spike Width t
SP
50 ns
Capacitive Load for Each Bus C
B
400 pF
W
H
L
W
N.C.
L
MAX5395 Single, 256-Tap Volatile, I
2
C, Low-Voltage Linear
Taper Digital Potentiometer
www.maximintegrated.com
Maxim Integrated │ 4
Electrical Characteristics (continued)