Datasheet

Detailed Description
The MAX5394 single, 256-tap volatile, low-voltage
linear taper digital potentiometer offers three end-to-
end resistance values of 10kΩ, 50kΩ, and 100kΩ.
Potentiometer terminals are independent of supply for
voltages up to +5.25V with single-supply operation from
1.7V to 5.5V (charge pump enabled). User-controlled
shutdown modes allow the H, W, or L terminals to be
opened with the wiper position set to zero-code, midcode,
full-code, or the value contained in the wiper register. Ultra-
low-quiescent supply current (< 1μA) can be achieved
for supply voltages between 2.6V and 5.5V by disabling
the internal charge pump and not allowing potentiometer
terminals to exceed the supply voltage by more than
0.3V. The MAX5394 provides a low 50ppm/°C end-to-end
temperature coefcient and features a SPI serial interface.
The small package size, low supply operating voltage,
low supply current, and automotive temperature range
of the MAX5394 make the device uniquely suited for the
portable consumer market and battery-backup industrial
applications.
Charge Pump
The MAX5394 contains an internal charge pump that
guarantees the maximum wiper resistance, R
WL
, to be less
than 50Ω (25Ω typ) for supply voltages down to 1.7V and
allows pins H, W, and L to be driven between GND and 5.25V
independent of V
DD
. Minimal charge-pump feedthrough
is present at the terminal outputs and is illustrated by the
Charge-Pump Feedthrough at W vs. Frequency graph in the
Typical Operating Characteristics. The charge pump is on by
default but can be disabled with QP_OFF and enabled with
the QP_ON commands (Table 1). The MAX5394 minimum
supply voltage with charge pump disabled is limited to 2.6V
and terminal voltage cannot exceed -0.3V to (V
DD
+ 0.3V).
SPI Interface
The digital interface is powered from V
DD
, not the internal
charge-pump voltage. Therefore the V
IH
and V
IL
logic
thresholds will follow V
DD
as specied in the Electrical
Characteristics table.
The SPI digital interface uses a 3-wire serial data interface
to control the wiper tap position. This write-only interface
contains three inputs: Chip Select (CS), Data In (DIN),
and Data Clock (SCLK). When CS is taken low, data
from the DIN pin is synchronously loaded into the serial
shift register on each falling edge of each SCLK pulse
(Figure 3). After all the data bits have been shifted in, they
are latched into the potentiometer control register. Data
written to a memory register immediately updates the
wiper position.
Keep CS low during the entire data stream to prevent the
data from being terminated. The power-on default position
of the wiper is midscale (D[7:0] = 80H).
Figure 3. SPI Digital Interface Format
H
L
CS
GND
DIN
W
V
DD
SCLK
MAX5394
SPI
INTERFACE
C7DIN
SCLK
C6 C5 C4 C3 C2 C1 C0 D7 D6 D5 D4 D3
WIPER REGISTER
LOADED
D2 D1 D0
CS
MAX5394 Single, 256-Tap Volatile, SPI, Low-Voltage Linear
Taper Digital Potentiometer
www.maximintegrated.com
Maxim Integrated │ 11
Functional Diagram