Datasheet

32Maxim Integrated
MAX5318
18-Bit, High-Accuracy Voltage Output DAC with
Digital Gain, Offset Control, and SPI Interface
Register Details
Table 11. No-Op Command (0x0)
Table 12a. Straight Binary DIN Write Register (TC/SB) = 0) (0x1)
Table 12b. Two’s Complement DIN Write Register (TC/SB) = 1) (0x1)
BIT 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NAME
X X X X X X X X X X X X X X X X X X
DEFAULT
X X X X X X X X X X X X X X X X X X
BIT NAME DESCRIPTION
17:0 Don’t care
No action on SPI shift register and DAC input registers. Use for daisy-chain purposes when
R[3:0] = 0000.
BIT 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NAME
B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
DEFAULT
0x00000 when M/Z = DGND (zero scale)
0x20000 when M/Z = V
DDIO
(midscale)
BIT NAME DESCRIPTION
17:0 B[17:0]
18-bit DAC input code in straight binary format. For clarity, a few examples are shown below:
00 0000 0000 0000 0000 0x00000 zero scale
01 0000 0000 0000 0000 0x10000 quarter scale
10 0000 0000 0000 0000 0x20000 midscale
11 0000 0000 0000 0000 0x30000 three-quarter scale
11 1111 1111 1111 1111 0x3FFFF full scale - 1 LSB
BIT 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
NAME
B17 B16 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
DEFAULT
0x20000 when M/Z = DGND (zero scale)
0x00000 when M/Z = V
DDIO
(midscale)
BIT NAME DESCRIPTION
17:0 B[17:0]
18-bit DAC input code in two’s complement format. For clarity, a few examples are shown below:
10 0000 0000 0000 0000 0x20000 zero scale
11 0000 0000 0000 0000 0x30000 quarter scale
11 1111 1111 1111 1111 0x3FFFF midscale - 1 LSB
00 0000 0000 0000 0000 0x00000 midscale
00 0000 0000 0000 0001 0x00001 midscale + 1 LSB
01 0000 0000 0000 0000 0x10000 three-quarter scale
01 1111 1111 1111 1111 0x1FFFF full scale - 1 LSB