Datasheet

2Maxim Integrated
MAX5318
18-Bit, High-Accuracy Voltage Output DAC with
Digital Gain, Offset Control, and SPI Interface
AGND to DGND ...................................................-0.3V to +0.3V
AGND_F, AGND_S to AGND
...............................-0.3V to +0.3V
AGND_F, AGND_S to DGND
...............................-0.3V to +0.3V
AVDD to AGND
.......................................................-0.3V to +6V
AVDD to REF
...........................................................-0.3V to +6V
AVSS to AGND
........................................................-2V to +0.3V
V
DDIO
to DGND .......................................................-0.3V to +6V
BYPASS to DGND
....................................... -0.3V to the lower of
(V
AVDD_
or V
DDIO
+ 0.3V) and +4.5V
OUT, REFO, RFB to AGND
......................... -0.3V to the lower of
(V
AVDD
+ 0.3V) and +6V
REF to AGND
...................-0.3V to the lower of V
AVDD
and +6V
SCLK, DIN, CS, BUSY, LDAC, READY,
M/Z, TC/SB, RST, PD, DOUT to DGND
....... -0.3V to the lower of
(V
DDIO
+ 0.3V) and +6V
Continuous Power Dissipation (T
A
= +70NC)
TSSOP (derate 13.9mW/NC above +70NC).............1111.1mW
Operating Temperature Range
........................ -40NC to +105NC
Maximum Junction Temperature
.....................................+150NC
Storage Temperature Range
............................ -65NC to +150NC
Lead Temperature (soldering, 10s)
................................+300NC
Soldering Temperature (reflow)
......................................+260NC
TSSOP
Junction-to-Case Thermal Resistance (q
JA
) ...............13°C/W
Junction-to-Ambient Thermal Resistance (q
JA
) ..........72°C/W
ABSOLUTE MAXIMUM RATINGS
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
ELECTRICAL CHARACTERISTICS
(V
AVDD
= V
DDIO
= 4.5V to 5.5V, V
AVSS
= -1.25V, V
AGND
= V
DGND
= V
AGND_F
= V
AGND_S
= 0V, V
REF
= 4.096V, TC/SB =
PD = LDAC = M/Z = DGND, RST = V
DDIO
, C
REFO
= 100pF, C
L
= 100pF, R
L
= 10kω, C
BYPASS
= 1µF, T
A
= -40°C to +105°C, unless
otherwise noted. Typical values are at T
A
= +25°C.) (GAIN = 0x3FFFF and OFFSET = 0x00000.)(Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STATIC PERFORMANCE
Resolution N 18 Bits
Integral Nonlinearity (Note 3) INL
DIN = 0x00000 to 0x3FFFF
(binary mode), DIN = 0x20000 to 0x1FFFF
(two’s complement mode)
-2
Q0.5
+2 LSB
DIN = 0x01900 to 0x3FFFF (binary
mode), DIN = 0x21900 to 0x1FFFF (two’s
complement mode), V
AVSS
= 0V
Differential Nonlinearity (Note 3) DNL -1
Q0.275
+1 LSB
Zero Code Error OE
DIN = 0, T
A
= +25NC
-48
Q4
+48
LSB
DIN = 0, T
A
= -40NC to +105NC Q14
Zero Code Error Drift (Note 4) DIN = 0 -1.6
Q0.10
+1.6
ppm/NC
Gain Error GE
T
A
= +25NC
-16
Q1
+16
LSB
T
A
= -40NC to +105NC Q27
Gain Error Temperature
Coefficient (Note 4)
TCGE -2.5
Q0.10
+2.5
ppm/NC
of FSR
Output Voltage Range No load 0
V
AVDD
-
0.1
V