Datasheet

MAX5312
±10V, 12-Bit, Serial, Voltage-Output DAC
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SCLK
DIN
DOUT
t
CS0
t
CSS
t
CP
t
CSH
t
CS1
t
CSW
t
CSD
t
LDS
t
LD
t
CH
t
DS
t
CSE
t
DO1
t
DH
t
CL
MSB
LSB
CS
LDAC
Figure 3. Serial-Interface Timing Diagram
RRR
2R 2R 2R 2R2R
D0 D11D10D1
REF
AGND
01010101
OUT
CONTROL LOGIC
2R
2R
2R
2R
SGND
DAC REGISTER
SW1
SW2
SW3
MAX5312
UNI/BIP
Figure 4. Basic Inverted DAC Ladder