Datasheet

ManualsBrandsMAXIM INTEGRATED ManualsData collecting ICsData acquisition IC - DA converter (DAC) SSOP 16

MAX5312

Data in the shift register is transferred to the input register

during the appropriate software command only. Data in

the input register is transferred to the DAC register in one

of two ways: using the software command, or through

external logic control using the asynchronous load input

(LDAC). Table 2 shows the software commands that

transfer the data from the shift register to the input and/or

DAC registers. The CLR, an external logic control, asyn-

chronously forces the input and DAC registers to zero

code, and the output to 0V, in both unipolar and bipolar

modes. The interface timing is shown in Figures 2 and 3.

Wait a minimum of 100ns after CS goes high before

implementing LDAC or CLR. If either of these logic

inputs activates during a data transfer, the incoming

data is corrupted and needs to be reloaded. For soft-

ware control only, connect LDAC and CLR high.

DAC Architecture

The MAX5312 uses an inverted DAC ladder architec-

ture to convert the digital input into an analog output

voltage. The digital input controls weighted-switches

that connect the DAC ladder nodes to either REF or

GND (Figure 4). The sum of the weights produces the

analog equivalent of the digital-input word and is then

buffered at the output.

±10V, 12-Bit, Serial, Voltage-Output DAC

14 ______________________________________________________________________________________

CONTROL BITS DATA BITS

MSB LSB

C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Table 1. Serial-Data Format

CONTROL BITS* INPUT DATA

C3 C2 C1 C0 D11–D0

FUNCTION

0 0 0 0 XXXXXXXXXXXX No operation; command is ignored.

0 0 1 0 12-bit DAC data Load input register from shift register; DAC output unchanged.

0 1 0 0 12-bit DAC data Load input and DAC registers from shift register; DAC output updated.

0 1 1 0 XXXXXXXXXXXX Load D AC r eg i ster fr om i np ut r eg i ster ; D AC outp ut up d ated ; i np ut r eg i ster unchang ed .

1 0 0 0 XXXXXXXXXXXX Enter shutdown; input and DAC registers unchanged.

1 1 0 0 XXXXXXXXXXXX Exit shutdown; input and DAC registers unchanged.

Table 2. Serial-Interface Programming Commands

X = Don’t care.

*All unlisted commands are reserved commands. Do not use.

SCLK

DIN

COMMAND EXECUTED

98 16 (1)1

C2C3 D0C1 C0 D11 D10 D9 D6 D5 D4 D3 D2 D1D8 D7

Figure 2. Serial-Interface Signals