Datasheet

MAX5312
±10V, 12-Bit, Serial, Voltage-Output DAC
12 ______________________________________________________________________________________
PIN NAME FUNCTION
1 SCLK
Serial-Clock Input. Data is shifted from DIN into the internal register on the rising edge of SCLK. Data is
clocked out at DOUT on the falling edge of SCLK. SCLK is active only while CS is low.
2 DIN S er i al - D ata Inp ut. D IN i s the d ata i np ut p or t for the ser i al i nter face. C l ock d ata i n on the r i si ng ed g e of S C LK.
3 CS Acti ve- Low C hi p - S el ect Inp ut. CS acti vates the ser i al i nter face. D r i ve CS l ow to i ni ti ate ser i al com m uni cati on.
4DOUT
Serial-Data Output. DOUT is the data output port for the serial interface. Data shifted into DIN appears at
DOUT 16.5 clock cycles later, valid on the falling edge of SCLK. DOUT is high impedance when CS is high.
5 DGND Digital Ground
6V
CC
Digital Power Input. V
CC
ranges from +2.7V to +5.5V. Bypass V
CC
with a 0.1µF and 1.0µF capacitor to
7 SHDN
Active-Low Shutdown Input. SHDN places the device into low-power shutdown mode. When shut down
REF and DOUT are high impedance, drive SHDN low to place the device into shutdown mode.
8 UNI/BIP
Unipolar/Bipolar-Select Input. UNI/BIP selects unipolar or bipolar output. In unipolar mode, the analog
output range is 0 to (+2 x V
REF
). In bipolar mode, the analog output range is (-2 x V
REF
) to (+2 x V
REF
).
Drive UNI/BIP high for unipolar output. Drive UNI/BIP low for bipolar output. Dual supplies are required for
bipolar operation.
9 OUT Analog Output. OUT is the output port for the DAC. Read OUT relative to SGND.
10 SGND
Signal Ground. SGND is the ground-reference node for the output amplifier’s internal feedback resistors.
Connect SGND directly to AGND. (See Figure 1.)
11 AGND Analog Ground. AGND is the ground return for V
DD
and V
SS
.
12 V
SS
Negative Power Input. Bypass V
SS
with a 0.1µF and 1.0µF capacitor to AGND. If operating with a single
supply, connect V
SS
to AGND.
13 REF
External Reference Input. Apply an external reference voltage of +2V to +5.25V to REF to determine the
output voltage range. In unipolar mode, the output range is from 0 to (+2 x V
REF
). In bipolar mode, the
output range is from (-2 x V
REF
) to (+2 x V
REF
).
14 V
DD
Positive Power Input. Bypass V
DD
with a 0.1µF and 1.0µF capacitor to AGND.
15 CLR
Active-Low Clear Input. CLR clears input and DAC registers and resets the DAC output to 0V. Drive CLR
low to assert the clear condition.
16 LDAC
Active-Low Load Input. Use LDAC to update the DAC register. LDAC is an asynchronous control input.
Drive low to force an update.
Pin Description