Datasheet

MAX5308/MAX5309
Low-Power, Low-Glitch, Octal 10-Bit Voltage-
Output DACs with Serial Interface
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and terminate all DAC outputs to GND through 100kΩ
resistors. CLR is asynchronous and can be applied at
any time. If CLR is toggled low during loading of a seri-
al word, that word will terminate and must be reloaded.
Reference Input
The external reference input has a typical input imped-
ance of 200kΩ. The input voltage range is from 800mV
to V
DD
. V
DD
can be used as the reference for the
MAX5308/MAX5309. The DAC outputs are then ratio-
metric to V
DD
.
Output Buffer
The rail-to-rail buffer amplifier is stable with any combi-
nation of resistive loads greater than 2kΩ and capaci-
tive loads less than 500pF. With a capacitive load of
200pF the output buffers have a slew rate of 1V/µs. For
a 1/4 FS to 3/4 FS output transition, the amplifier output
typically settles to 1/2 LSB in less than 10µs when
loaded with 2kΩ in parallel with 200pF.
Power-On Reset
The MAX5308/MAX5309 have a POR circuit to set the
DACs’ output to zero when V
DD
is first applied. This
ensures that unwanted DAC output voltages will not
occur immediately following a system startup, such as
after a loss of power. Upon initial power-up the POR cir-
cuit ensures that all DAC registers are cleared, the
DACs are powered-down, and their outputs are termi-
nated to GND through a 100kΩ resistor.
Applications Information
Daisy-Chaining Devices
Any number of MAX5308s can be daisy-chained by
connecting the DOUT pin of one device to the DIN pin
of the following device in the chain (Figure 5). To write
to the chain, drive CS low until all n ✕ 16 clock cycles
(where n is the number of devices in the chain) and
associated data have been applied to the first device.
When CS is driven high, each device in the chain acts
on the 16 bits in its input register. To adjust a single
device in the chain, a No-Operation (NOP) command
must be loaded for all other devices.
Figure 6 shows an alternate method of connecting sev-
eral MAX5308s or MAX5309s. In this configuration, the
data bus is common to all devices; data is not shifted
through a daisy chain. More I/O lines are required in
this configuration because a dedicated chip-select
input (CS) is required for each IC.
Unipolar Output
The MAX5308/MAX5309 are normally configured for
unipolar output. Table 3 lists the unipolar output volt-
ages vs. digital codes.
Bipolar Output
The MAX5308/MAX5309 outputs can be configured for
bipolar operation using Figure 7’s circuit.
V
OUT
= V
REF
[(2D / 1024) -1]
SCLK
DIN
DOUT*
CS
SK
SO
SI*
I/O
MICROWIRE
PORT
*THE DOUT-SI CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX5308,
BUT MAY BE USED FOR TRANSMISSION VERIFICATION PURPOSES.
MAX5308
Figure 2. Connections for MICROWIRE
DOUT*
DIN
SCLK
CS
MISO*
MOSI
SCK
I/O
SPI/QSPI
PORT
SS
+5V
CPOL = 0, CPHA = 0
*THE DOUT-MISO CONNECTION IS NOT REQUIRED FOR WRITING TO THE MAX5309,
BUT MAY BE USED FOR TRANSMISSION VERIFICATION PURPOSES.
MAX5308
Figure 3. Connections for SPI/QSPI