Datasheet

MAX5115/MAX5116
Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
Interface
16 ______________________________________________________________________________________
the device remains powered. The nonvolatile register
maintains data even after power is removed. The
MAX5115/MAX5116 start up (power first applied) by
transferring the mute/power-down from the nonvolatile
to the volatile control register. The nonvolatile control
register is set to 00 hex at the factory.
Power-On Reset
Power-on reset (POR) circuitry controls the initializa-
tion of the MAX5115/MAX5116. A power-on reset
loads the volatile registers with the data stored in the
nonvolatile registers.
This initialization period takes 500µs (typ). During this
time, the DAC outputs are held in mute mode. At the
completion of the initialization period, the DAC outputs
update in accordance with the configuration register.
DAC Data
The 8-bit DAC data is decoded as offset binary, MSB
first, with 1 LSB = (V
REFH_
- V
REFL_
) / 256, and convert-
ed into the corresponding analog voltage as shown in
Table 9.
NONVOLATILE
(NV)
VOLATILE
(V)
FUNCTION
0 1 Read from VREG_
1 0 Read from NVREG_
Table 5. Volatile and Nonvolatile Read
Selection
R3 R2 R1 R0 FUNCTION
0 0 0 0 DAC0
0 0 0 1 DAC1
0 0 1 0 DAC2
0 0 1 1 DAC3
Table 6. DAC Read Selection
DATA BYTE
ADDRESS
BYTE
COMMAND BYTE
MSB LSB
COMMAND
S
T
A
R
T
R/
W
A
C
K
C
7
C
6
C
5
C
4
C
3
C
2
C
1
C
0
A
C
K
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
A
C
K
STOP
Write VCTL S 0 0 0 0 1 0 1 0 0 Control register* P
Write NVCTL S 0 0 0 1 0 0 1 0 0 Control register* P
Write VCTL
and NVCTL
S 0 0 0 1 1 0 1 0 0 Control register* P
Transfer
NVCTL to
VCTL
S 0 0 0 0 0 0 1 0 0 Control register* P
Table 7. Mute/Power-Down Operation
*See Mute/Power-Down Control Register (Table 8).
BIT IN REGISTER
D7
(MSB)
D6 D5 D4 D3 D2 D1
D0
(LSB)
CONTROLLING
FUNCTION
Mute DAC3 Mute DAC2 Mute DAC1 Mute DAC0
Power-down
DAC3
Power-down
DAC2
Power-down
DAC1
Power-down
DAC0
Table 8. Mute/Power-Down Control Register