Datasheet

MAX5088/MAX5089
2.2MHz, 2A Buck Converters with an
Integrated High-Side Switch
22 ______________________________________________________________________________________
V+
DRAIN
OUTPUT1
C
IN
V
IN
SOURCE
CLKOUT
MASTER
SYNC
SYNC
CLKOUT
(MASTER)
SOURCE
(MASTER)
SOURCE
(SLAVE)
CLKIN
DUTY CYCLE = 50%
V+
DRAIN
SOURCE
SLAVE
SYNC
OUTPUT2
SYNC
PHASE
CLKOUT
PHASE
Figure 7. Synchronized Converters
15
16
14
13
6
5
7
DRAIN
FB
8
DRAIN
PGND DL SOURCE
1
+
2
PGOOD
4
12 11 9
BST/VDD
EN
V
L
V+
BYPASS
OSC
MAX5089
COMP SGND
3
10
SYNC
THIN QFN
5mm x 5mm
TOP VIEW
EP*
*EXPOSED PAD.
Pin Configurations (continued)
Chip Information
PROCESS: BiCMOS