Datasheet
MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
26 ______________________________________________________________________________________
Keep the maximum output voltage deviation less than
or equal to the adaptive voltage-positioning window
(∆V
OUT
). Assume 50% contribution each from the out-
put capacitance discharge and the ESR drop. Use the
following equations to calculate the required ESR and
capacitance value:
where I
STEP
is the load step and t
RESPONSE
is the
response time of the controller. Controller response
time depends on the control-loop bandwidth.
Current Limit
In addition to the average current limit, the
MAX5060/MAX5061 also have hiccup current limit. The
hiccup current limit is set to 10% below the average
current limit to ensure that the circuit goes in hiccup
mode during continuous output short circuit.
Connecting a resistor from LIM to ground increases the
hiccup current limit, while shorting LIM to ground dis-
ables the hiccup current-limit circuit.
Average Current Limit
The average-current-mode control technique of the
MAX5060/MAX5061 accurately limits the maximum out-
put current. The MAX5060/MAX5061 sense the voltage
across the sense resistor and limit the peak inductor
current (I
L-PK
) accordingly. The ON cycle terminates
when the current-sense voltage reaches 25.5mV (min).
Use the following equation to calculate the maximum
current-sense resistor value:
where PD
R
is the power dissipation in the sense resis-
tors. Select a 5% lower value of R
S
to compensate for
any parasitics associated with the PC board. Also,
select a non-inductive resistor with the appropriate
power rating.
Hiccup Current Limit
The hiccup current-limit value is always 10% lower than
the average current-limit threshold, when LIM is left
unconnected. Connect a resistor from LIM to SGND to
increase the hiccup current-limit value from 90% to
100% of the average current-limit value. The average
current-limit architecture accurately limits the average
output current to its current-limit threshold. If the hiccup
current limit is programmed to be equal or above the
average current-limit value, the output current will not
reach the point where the hiccup current limit can trig-
ger. Program the hiccup current limit at least 5% below
the average current limit to ensure that the hiccup cur-
rent-limit circuit triggers during overload. See the
Hiccup Current Limit vs. R
EXT
graph in the Typical
Operating Characteristics.
Reverse Current Limit (MAX5060)
The MAX5060 limits the reverse current in case V
BUS
is
higher than the preset output voltage. Calculate the
maximum reverse current based on V
CLR
, the reverse-
current-limit threshold and the current-sense resistor.
where I
REVERSE
is the total reverse current sink into the
converter and V
CLR
= 2.3mV (typ).
Compensation
The main control loop consists of an inner current loop
and an outer voltage loop. The MAX5060/MAX5061 use
an average current-mode control scheme to regulate
the output voltage (Figure 5). I
PHASE
is the inner aver-
age current loop. The VEA output provides the control-
ling voltage for this current source. The inner current
loop absorbs the inductor pole reducing the order of
the outer voltage loop to that of a single-pole system.
A resistive feedback network around the VEA provides
the best possible response, since there are no capaci-
tors to charge and discharge during large-signal excur-
sions. R
F
and R
IN
determine the VEA gain. Use the
following equation to calculate the value of R
F
:
where G
C
is the current-loop transconductance and R
S
is the value of the sense resistor.
When designing the current-control loop ensure that
the inductor downslope (when it becomes an upslope
at the CEA output) does not exceed the ramp slope.
This is a necessary condition to avoid sub-harmonic
oscillations similar to those in peak current-mode con-
trol with insufficient slope compensation.
R
IR
GV
G
R
F
OUT IN
C OUT
C
S
=
×
×
=
.
∆
0 0289
I
V
R
REVERSE
CLR
S
=
R
I
PD
R
S
OUT
R
S
=
=
×
−
0 0255
075 10
3
.
.
ESR
V
I
C
It
V
OUT
ESR
STEP
OUT
STEP RESPONSE
Q
=
=
×
∆
∆