Datasheet

MAX5060/MAX5061
0.6V to 5.5V Output, Parallelable,
Average-Current-Mode DC-DC Controllers
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Pin Description (continued)
PIN
MAX5060 MAX5061
NAME FUNCTION
17 12 EAOUT
Voltage-Error-Amplifier Output. Connect to the external gain-setting feedback
resistor. The error-amplifier gain-setting resistors determine the amount of
adaptive voltage positioning.
18 13 EAN
Voltage-Error-Amplifier Inverting Input. Receives a signal from the output of the
differential remote-sense amplifier (MAX5060). Connect the center tap of the
resistor-divider from the output to SGND (MAX5061).
19 — DIFF
Differential Remote-Sense Amplifier Output. DIFF is the output of a precision
unity-gain amplifier whose inputs are SENSE+ and SENSE-.
20 14 CSN
Current-Sense Differential Amplifier Negative Input. The differential voltage
between CSN and CSP is amplified internally by the current-sense amplifier
(gain = 34.5) to measure the inductor current.
21 15 CSP
Current-Sense Differential Amplifier Positive Input. The differential voltage
between CSP and CSN is amplified internally by the current-sense amplifier
(gain = 34.5) to measure the inductor current.
23 — SENSE-
Differential Output-Voltage-Sensing Negative Input. SENSE- is used to sense a
remote load. Connect SENSE- to V
OUT-
or PGND at the load.
24 — SENSE+
Differential Output-Voltage-Sensing Positive Input. SENSE+ is used to sense a
remote load. Connect SENSE+ to V
OUT+
at the load. The device regulates the
difference between SENSE+ and SENSE- according to the preset reference
voltage of 0.6V.
26 1 IN Supply Voltage Connection. Connect IN to V
CC
for a +5V system.
27 2 V
CC
Internal +5V Regulator Output. V
CC
is derived from the IN voltage. Bypass V
CC
to SGND with 4.7µF and 0.1µF ceramic capacitors. For MAX5061, connect an
additional 0.1µF bypass capacitor from V
CC
to PGND.
28 — V
DD
Supply Voltage for Low-Side and High-Side Drivers. Connect a parallel
combination of 0.1µF and 1µF ceramic capacitors to PGND and a 1Ω resistor to
V
CC
to filter out the high peak currents of the driver from the internal circuitry.
—9RT/SYNC/EN
Switching Frequency Programming and Chip-Enable Input. Connect a resistor
from RT/SYNC/EN to SGND to set the internal oscillator frequency. Drive
RT/SYNC/EN externally to synchronize the switching frequency with system
clock. If RT/SYNC/EN is held low for 50µs, the device turns off the output drivers.
—— EP
Exposed Paddle. Connect the exposed paddle to a copper pad (SGND) to
improve power dissipation.