Datasheet

4A, 20ns, Dual MOSFET Drivers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
DD
= 4V to 15V, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 15V and T
A
= +25°C.) (Note 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to GND.)
V
DD
...............................................................................-0.3V to +18V
INA+, INA-, INB+, INB- ...............................................-0.3V to +18V
OUTA, OUTB...................................................-0.3V to (V
DD
+ 0.3V)
OUTA, OUTB Short-Circuit Duration ........................................10ms
Continuous Source/Sink Current at OUT_ (P
D
< P
DMAX
) .....200mA
Continuous Power Dissipation (T
A
= +70°C)
8-Pin TDFN-EP (derate 18.2mW/°C above +70°C)........1454mW
8-Pin SO-EP (derate 19.2mW/°C above +70°C)… ........1538mW
8-Pin SO (derate 5.9mW/°C above +70°C)… ..................471mW
Operating Temperature Range..............................-40°C to +125°C
Storage Temperature Range .................................-65°C to +150°C
Junction Temperature ...........................................................+150°C
Lead Temperature (soldering, 10s)......................................+300°C
Soldering Temperature (reflow)............................................+260°C
PACKAGE THERMAL CHARACTERISTICS (Note 1)
MAX5054–MAX5057
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
V
DD
Operating Range V
DD
415V
V
DD
Undervoltage Lockout UVLO V
DD
rising 3.00 3.50 3.85 V
V
DD
Undervoltage Lockout
Hysteresis
200 mV
V
DD
Undervoltage Lockout to
Output Delay
V
DD
rising 12 µs
V
DD
= 4V 28 55
I
DD
INA- = INB- = V
DD
,
INA+ = INB+ = 0V
(not switching)
V
DD
= 15V 40 75
µA
V
DD
Supply Current
I
DD-SW
INA- = 0V, INB+ = V
DD
= 15V,
INA+ = INB- both channels switching at
250kHz, C
L
= 0F
1 2.4 4 mA
DRIVER OUTPUT (SINK)
T
A
= +25°C 1.1 1.8
V
DD
= 15V,
I
OUT_
= -100mA
T
A
= +125°C 1.5 2.4
T
A
= +25°C 2.2 3.3
Driver Output Resistance Pulling
Down
R
ON-N
V
DD
= 4.5V,
I
OUT_
= -100mA
T
A
= +125°C 3.0 4.5
Ω
Peak Output Current (Sinking) I
PK-N
V
DD
= 15V, C
L
= 10,000pF 4 A
V
DD
= 4.5V 0.45
Output-Voltage Low I
OUT_
= -100mA
V
DD
= 15V 0.24
V
Latchup Protection I
LUP
Reverse current I
OUT_
(Note 2) 400 mA
8 TDFN-EP
Junction-to-Ambient Thermal Resistance (θ
JA
)...............+41°C/W
Junction-to-Case Thermal Resistance (θ
JC
)......................+8°C/W
8 SO
Junction-to-Ambient Thermal Resistance (θ
JA
)................+132°C/W
Junction-to-Case Thermal Resistance (θ
JC
).......................+40°C/W
8 SO-EP
Junction-to-Ambient Thermal Resistance (θ
JA
)..................+41°C/W
Junction-to-Case Thermal Resistance (θ
JC
)......................+7°C/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial
.