Datasheet
MAX4959/MAX4960
High-Voltage OVP with Battery Switchover
3
Maxim Integrated
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= +19V, T
A
= -40°C to +85°C, unless otherwise noted, C
VDD
= 100nF. Typical values are at T
A
= +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
GATE1 Leakage Current G1I
LKG
V
OV S
> OV
R E F
, V
U V S
< U V
R E F
, or V
C B
= + 5V -1 +1 µA
GATE2 Leakage Current G2I
LKG
V
CB
= 0V -1 +1 µA
CB
Logic-Level High V
IH
1.5 V
Logic-Level Low V
IL
0.4 V
CB Pulldown Resistor R
CBPD
123MΩ
TIMING
Debounce Time t
DEB
V
OVP
> V
IN
> V
UVP
for greater than t
DEB
for
GATE1 to go low
10 25 40 ms
GATE1 Assertion Delay from
CB Pin
t1
GATE
CB = +3V to 0
rise time = fall time = 5ns (Note 3)
50 ns
GATE2 Assertion Delay from
CB Pin
t2
GATE
CB = 0 to +3V
rise time = fall time = 5ns (Note 3)
50 ns
Blanking Time t
BLANK
10 25 40 ms
MAX4960
SOURCE1/GATE1 Resistance R
SG
(MAX4960) 140 200 260 kΩ
GATE1/Ground Resistance R
GG
GATE1 Asserted (MAX4960) 140 200 260 kΩ
Note 1: All devices are production tested at T
A
= +25°C. Specifications over temperature are guaranteed by design.
Note 2: Do not exceed absolute maximum rating; the ratio between the externally set OVLO and UVLO threshold must not exceed 4,
[OVLO/UVLO]
MAX
≤ 4.
Note 3: Assertion delay starts from switching of CB pin to reaching of 80% of GATE1/GATE2 transition. This delay is measured without
external capacitive load.
POWER-UP RESPONSE
(R
PULLUP
= 1kΩ)
MAX4959/60 toc01
TIME (μs)
VOLTAGE (V)
100500-50-100
0
2
4
6
8
10
12
-2
-150 150
V
IN
V
DD
V
GATE1
OVERVOLTAGE RESPONSE
(R
PULLUP
= 5kΩ)
MAX4959/60 toc02
TIME (μs)
VOLTAGE (V)
100500-50-100
5
10
15
20
25
30
0
-150 150
V
IN
V
DD
V
GATE1
UNDERVOLTAGE RESPONSE
(WITHIN BLANKING TIME)
(R
PULLUP
= 1kΩ)
MAX4959/60 toc03
TIME (μs)
VOLTAGE (V)
605010 20 30 40
2
4
6
8
10
12
14
16
0
070
DRAIN OF P1
V
IN
V
GATE1
Typical Operating Characteristics
(V
OVLO
= 22.2V and V
UVLO
= 10.1V, R1 = 887kΩ, R2 = 66.5kΩ, R3 = 54.9kΩ, all resistors 1%, OV
REF
= UV
REF
= 1.228V.)