Datasheet
MAX4950A
Dual PCI Express Equalizer/Redriver
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +3.0V to +3.6V, C
CL
= 75nF coupling capacitor on each output, R
L
= 50Ω resistor on each output, T
A
= 0°C to +70°C, unless
otherwise noted. Typical values are at V
CC
= +3.3V and T
A
= +25°C.) (Note 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Electrical Idle Detect Threshold
V
TX-IDLE-
THRESH
65 95 120 mV
P-P
Output Voltage During Electrical
Idle (AC)
V
TX-IDLE-
DIFF-AC-P
ABS|V
OUT_P
- V
OUT_M
|, f = 500MHz 25 mV
P-P
Receiver Detect Pulse
Amplitude (Note 5)
V
TX-RCV-
DETECT
Voltage change in positive direction 600 mV
Receiver Detect Pulse Width 100 ns
Receiver Detect Retry Period 200 ns
CONTROL LOGIC (INEQ_1, INEQ_0, ODE_1, ODE_0, EN, RX_DET, O_AMP_)
Input Logic-Level Low V
IL
0.6 V
Input Logic-Level High V
IH
1.4 V
Input Logic Hysteresis V
HYST
130 mV
Input Leakage Current I
IN
V
CONTROL_LOGIC
= +0.5V or +1.5V -50 +50 μA
Note 3: All devices are 100% production tested at T
A
= +70°C. Specifications for all temperature limits are guaranteed by design.
Note 4: Currents are applicable for both PCIe Generation I and Generation II speeds. Table 5 summarizes the predicted power
consumption.
Note 5: Guaranteed by design, unless otherwise noted.
Note 6: Equivalent to the same amount of deemphasis driving the output.
Note 7: Rise and fall times are measured using 20% and 80% levels.
Timing Diagram
V
LOW_P-P
PE(dB) = 20
[
log
(
)]
V
HIGH_P-P
V
LOW_P-P
V
HIGH_P-P
Figure 1. Illustration of Output Deemphasis










