Datasheet

MAX4947/MAX4948
Hex SPDT Data Switch
_______________________________________________________________________________________ 9
t
skew_i
90%
50%
10%
90%
50%
10%
t
fi
INPUT A+
INPUT A-
t
ri
t
skew_o
90%
50%
10%
90%
50%
10%
t
fo
OUTPUT B+
OUTPUT B-
t
ro
B-
C
L
A-
R
s
A+
B+
C
L
TxD+
TxD-
R
s
R
s
= 39Ω
C
L
= 50pF
DELAY DUE TO SWITCH FOR RISING INPUT AND RISING OUTPUT SIGNALS.
DELAY DUE TO SWITCH FOR FALLING INPUT AND FALLING OUTPUT SIGNALS.
CHANGE IN SKEW THROUGH THE SWITCH FOR OUTPUT SIGNALS.
CHANGE IN SKEW THROUGH THE SWITCH FOR INPUT SIGNALS.
|t
skew_i
|
|t
skew_o
|
|t
fo -
t
fi
|
|t
ro -
t
ri
|
MAX4947/MAX4948
•
•
•
•
•
•
•
Figure 3. Input/Output Skew Timing Diagram
Timing Circuits/Timing Diagrams (continued)
50%
V
CC
0V
LOGIC
INPUT
V
OUT
0.9 x V
OUT
t
BBM
LOGIC
INPUT
R
L
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
CB_
NC_
V
OUT
V
CC
V
CC
C
L
V
N_
COM_
MAX4947/
MAX4948
Figure 2. Break-Before-Make-Interval