Datasheet

Dual/Quad, Unipolar/Bipolar,
High-Voltage Digital Pulsers
MAX4940/MAX4940A
10 _____________________________________________________________________________________
Detailed Description
The MAX4940/MAX4940A are quad high-voltage, high-
speed pulsers that can be independently configured
for either unipolar/bipolar/multilevel pulse outputs (see
Figures 5 and 6.). These devices have independent
logic inputs for full pulse control and independent active
clamps. The clamp input, CLP_, can be set high to
activate the clamp automatically when the device is not
pulsing to the positive or negative high-voltage supplies.
Logic Inputs (INP_, INN_, CLP_, EN)
INP_ controls the on and off states of the high-side FET,
INN_ controls the on and off states of the low-side FET,
and CLP_ controls the active clamp. A global enable
input (EN) can be used to enable/disable all channels.
These signals give complete control of the output stage
of each driver (see the Truth Tables section for all logic
combinations). The MAX4940/MAX4940A logic inputs
are CMOS logic compatible and the logic levels are ref- CMOS logic compatible and the logic levels are ref-CMOS logic compatible and the logic levels are ref- compatible and the logic levels are ref-compatible and the logic levels are ref-
erenced to V
DD
for maximum flexibility. The low 5pF (typ)
input capacitance of the logic inputs reduce loading and
increase switching speed.
Truth Tables
MAX4940
MAX4940A
X = Don’t care.
0 = Logic-low.
1 = Logic-high.
INPUTS OUTPUTS
STATE
EN INP_ INN_ CLP_ OUT_
0 X X X High impedance Powered up, INP_/INN_ disabled.
1 0 0 0 High impedance Powered up, all inputs enabled.
1 0 0 1 GND Powered up, all inputs enabled.
1 0 1 X V
NN_
Powered up, all inputs enabled.
1 1 0 X V
PP_
Powered up, all inputs enabled.
1 1 1 X Not allowed Not allowed.
INPUTS OUTPUTS
STATE
EN
INP1A
INP1B
INN1A
INN1B
CLP1A
CLP1B
OUT1A
OUT1B
0 X X X High impedance Powered up, INP_/INN_ disabled.
1 0 0 0 High impedance Powered up, all inputs enabled.
1 0 0 1 GND Powered up, all inputs enabled.
1 0 1 0 V
NN_
Powered up, all inputs enabled.
1 1 0 0 V
PP_
Powered up, all inputs enabled.
1 1 1 1 Not allowed Not allowed.
INPUTS OUTPUTS
STATE
EN
INP2A
INP2B
INN2A
INN2B
CLP2A
CLP2B
OUT2A
OUT2B
0 X X X High impedance Powered up, INP_/INN_ disabled.
1 0 0 0 High impedance Powered up, all inputs enabled.
1 0 0 1 GND Powered up, all inputs enabled.
1 0 1 X V
NN_
Powered up, all inputs enabled.
1 1 0 X V
PP_
Powered up, all inputs enabled.
1 1 1 X Not allowed Not allowed.