Datasheet

MAX4929E
HDMI 2:1 Low-Frequency Translating Switch
4 _______________________________________________________________________________________
Test Circuits/Timing Diagrams
Figure 1. Channel Off-/On-Capacitance
CAPACITANCE
METER
SDA_/
SCL_
SDAO/SCLO
GND
SEL
V
IL
OR V
IH
VL
CLP
HIZ2
HIZ1
0.1μF
VL
0.1μF
+5V
+3.3V
f = 1MHz
V+
MAX4929E
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN SDAO/SCLO AND "OFF" SDA_/SCL_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN SDAO/SCLO AND "ON" SDA_/SCL_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
+5V+3.3V
V
OUT
V+VLCLP
SEL
SDA1/
SCL1
SDAO/
SCLO
SDA2/
SCL2*
V
IN
MAX4929E
OFF-ISOLATION = 20log
V
OUT
V
IN
ON-LOSS = 20log
V
OUT
V
IN
CROSSTALK = 20log
V
OUT
V
IN
NETWORK
ANALYZER
50Ω
50Ω 50Ω
50Ω
MEAS REF
0.1μF 0.1μF
0V OR VL
HIZ1
VL
HIZ2
50Ω
GND
*FOR CROSSTALK THIS PIN IS SCL2.
SCL1 AND SCL0 ARE OPEN.
Figure 2. On-Loss, Off-Isolation, and Crosstalk
Figure 3. Logic Delay Timing
t
r
< 5ns
t
f
< 5ns
50%
0V
V+ or V
L
0V
0.9 x V
0UT
t
PD(HPDO)
t
PD(HPIRO)
V
OUT
HPDO_
HPIRO
HPD
HPIR_