Datasheet

MAX4906EF
High-/Full-Speed USB 2.0 Switches
with High ESD
8 _______________________________________________________________________________________
Test Circuits/Timing Diagrams (continued)
CAPACITANCE
METER
NC_ or
NO_
COM_
GND
IN
V
IL
OR V
IH
10nF
V+
f = 1MHz
V+
MAX4906EF
Figure 2. Channel Off-/On-Capacitance
t
r
< 5ns
t
f
< 5ns
50%
V
IL
LOGIC
INPUT
R
L
COM_
GND
IN
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
N_ (
R
L
)
R
L
+ R
ON
V
N_
V
IH
t
OFF
0V
NO_
OR NC_
0.9 x V
0UT
0.1 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
V+
C
L
V+
V
OUT
MAX4906EF
Figure 3. Switching Time