Datasheet
MAX4814E
DVI/HDMI 2:4 Low-Frequency Fanout Switch
_______________________________________________________________________________________ 7
Pin Description
PIN NAME FUNCTION
1, 16, 24, 25, 33, 48, 56, 57
GND Ground. Must connect all GND pins together.
2, 15, 34 I.C. Internally Connected. Leave I.C. unconnected
3 A[0] Switch A I/O 0. A[0] has a 3Ω (typ) resistance to switch 5V or drain.
4 A[1] Switch A I/O 1. A[1] has a 12Ω (typ) resistance to switch data.
5 A[2] Switch A I/O 2. A[2] has a 12Ω (typ) resistance to switch data.
6 A[3] Switch A I/O 3. A[3] has a 12Ω (typ) resistance to switch data.
7 A[4] Switch A I/O 4. A[4] has a 3Ω (typ) resistance to switch 5V or drain.
8, 9, 17, 32, 40, 41, 49, 64
V
DD
Positive-Supply Voltage Input. Connect V
DD
to a +5V supply voltage. Bypass V
DD
to
GND with a 0.1µF capacitor. Must connect all V
DD
pins together.
10 B[0] Switch B I/O 0. B[0] has a 3Ω (typ) resistance to switch 5V or drain.
11 B[1] Switch B I/O 1. B[1] has a 12Ω (typ) resistance to switch data.
12 B[2] Switch B I/O 2. B[2] has a 12Ω (typ) resistance to switch data.
13 B[3] Switch B I/O 3. B[3] has a 12Ω (typ) resistance to switch data.
14 B[4] Switch B I/O 4. B[4] has a 3Ω (typ) resistance to switch 5V or drain.
18 MODE
MODE Selection Input. Connect MODE to V
DD
(MODE = 1) to select I
2
C control mode.
Connect MODE to GND (MODE = 0) to select direct-control mode.
19 SDA I
2
C-Compatible Serial Data I/O
20 SCL I
2
C-Compatible Serial Clock Input
21 AD0
Programmable I
2
C Address Bit. AD[0] sets the I
2
C address of the device. User-
selectable device address bit, LSB, LSB+1, MSB (see Figure 5).
22 AD1
Programmable I
2
C Address Bit. AD[1] sets the I
2
C address of the device. User-
selectable device address bit, LSB, LSB+1, MSB (see Figure 5).
23 AD2
Programmable I
2
C Address Bit. AD[2] sets the I
2
C address of the device. User-
selectable device address bit, LSB, LSB+1, MSB (see Figure 5).
26
SW3[4]
Switch 3 I/O 4
27
SW3[3]
Switch 3 I/O 3
28
SW3[2]
Switch 3 I/O 2
29
SW3[1]
Switch 3 I/O 1
30
SW3[0]
Switch 3 I/O 0
31, 50 EFN
ESD Protection. Connect EFN with an external 0.1µF capacitor to GND for ±15kV ESD
HBM protection. The capacitor from EFN to GND provides an additional discharge path
for the ESD energy.
35
SW2[4]
Switch 2 I/O 4
36
SW2[3]
Switch 2 I/O 3
37
SW2[2]
Switch 2 I/O 2
38
SW2[1]
Switch 2 I/O 1
39
SW2[0]
Switch 2 I/O 0
42
SW1[4]
Switch 1 I/O 4
43
SW1[3]
Switch 1 I/O 3
44
SW1[2]
Switch 1 I/O 2