Datasheet

MAX4747–MAX4750
Applications Information
Operating Considerations for
High-Voltage Supply
The MAX4747–MAX4750 operate to +11V with some
precautions. The absolute maximum rating for V+ is
+12V (referenced to GND). When operating near this
region, bypass V+ with a minimum 0.1µF capacitor to
ground as close to the IC as possible.
Logic Levels
The MAX4747–MAX4750 are TTL compatible when
powered from a single +3V supply. When powered from
other supply voltages, the logic inputs should be driven
rail-to-rail. For example, with a +11V supply, IN_ should
be driven low to 0V and high to 11V. With a +3.3V sup-
ply, IN_ should be driven low to 0V and high to 3.3V.
Driving IN_ rail-to-rail minimizes power consumption.
Analog Signal Levels
Analog signals that range over the entire supply volt-
age (GND to V+) pass with very little change in R
ON
(see the Typical Operating Characteristics ). The bidi-
rectional switches allow NO_, NC_, and COM_ connec-
tions to be used as either inputs or outputs.
Power-Supply Sequencing and
Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings. Stresses beyond the listed ratings can
cause permanent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current limited. If this sequencing is not possible, and if
the analog inputs are not current limited to < 20mA, add
small-signal diode D1 as shown in Figure 1. If the ana-
log signal can dip below GND, add D2. Adding protec-
tion diodes reduces the analog signal range to a diode
drop (about 0.7V) below V+ (for D1), and to a diode
drop above ground (for D2). Leakage is unaffected by
adding the diodes. On-resistance increases slightly at
low supply voltages. Maximum supply voltage (V+) must
not exceed +11V.
Adding protection diodes causes the logic thresholds to
be shifted relative to the power-supply rails. The most
significant shift occurs when using low supply voltages
(+5V or less). With a +5V supply, TTL compatibility is
not guaranteed when protection diodes are added.
Driving IN_ and IN_ all the way to the supply rails (i.e., to
a diode drop higher than the V+ pin, or to a diode drop
lower than the GND pin) is always acceptable.
Protection diodes D1 and D2 also protect against some
overvoltage situations. Using the circuit in Figure 1, no
damage results if the supply voltage is below the
absolute maximum rating (+12V) and if a fault voltage
up to the absolute maximum rating (V+ + 0.3V) is
applied to an analog signal terminal.
WLP Applications Information
For the latest application details on WLP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow
temperature profile, as well as the latest information on
reliability testing results, refer to the Application Note
1891:
Wafer-Level Packaging (WLP) and its Applications
on Maxim’s web site at www.maxim-ic.com/wlp.
MAX4747–
MAX4750
NO_ COM_
GND
V+
*INTERNAL PROTECTION DIODES
D2
D1
EXTERNAL BLOCKING DIODE
EXTERNAL BLOCKING DIODE
GND
V+
*
*
*
*
Figure 1. Overvoltage Protection Using External Blocking Diodes
Test Circuits/Timing Diagrams
50 Ω , Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
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