Datasheet

Applications Information
Ground
V+ and GND power the internal logic and logic-level trans-
lators. The logic-level translators convert the logic-level
inputs to V+ and V- to drive the gates of the internal FETs.
In this design, there is no galvanic connection inside the
MAX4708/MAX4709 between the analog signal paths and
GND. ESD-protection diodes connect A_ to V+ and V-.
Supply Current Reduction
Driving the logic signals rail-to-rail from 0 to +15V or
-15V to +15V reduces the current consumption from
370µA (typ) to 200µA (typ) (see the Electrical Charac-
teristic s table, Power Supplies).
Power Supplies
The MAX4708/MAX4709 operate with bipolar supplies
between ±4.5V and ±20V. The V+ and V- supplies
need not be symmetrical, but V+ - V- cannot exceed
the 44V absolute maximum rating.
The MAX4708/MAX4709 operate from single supplies
between +9V and +36V when V- is connected to GND.
Chip Information
PROCESS: CMOS
SUBSTRATE INTERNALLY CONNECTED TO V+
MAX4708/MAX4709
Fault-Protected, Single 8-to-1/
Dual 4-to-1 Multiplexers
______________________________________________________________________________________ 11
NORMALLY OPEN SWITCH CONSTRUCTION
COM_
P1
N1
ON
LOW
FAULT
HIGH
FAULT
V+
NO_
A_
GND
ESD DIODES
V-
MAX4708
MAX4709
Pin Configurations/Functional Diagrams (continued)
Figure 1. Functional Diagram
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages
.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 Narrow SO —
21-0041
16 Wide SO —
21-0042
16 Plastic DIP —
21-0043