Datasheet

MAX4599
Low-Voltage, Single-Supply,
SPDT Analog Switch in SC70
_______________________________________________________________________________________ 7
t
r
< 20ns
t
f
< 20ns
50%
0
LOGIC
INPUT
R
L
1k
COM
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
COM (
R
L
)
R
L
+ R
ON
SWITCH
INPUT
IN
+3V
t
OFF
0
NO
OR NC
SWITCH
OUTPUT
0.9 x V
0UT
0.9 x V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
L
35pF
V+
V
OUT
MAX4599
Figure 2. Switching Time
Test Circuits/Timing Diagrams
V
GEN
GND
COM
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
∆V
OUT
Q = (∆V
OUT
)(C
L
)
NC
OR NO
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
IN
= V+
V+
R
GEN
IN
MAX4599
Figure 4. Charge Injection
50%
+3V
0
LOGIC
INPUT
SWITCH
OUTPUT
(V
OUT
)
0.9 x V
OUT
0.9 x V
OUT
t
BBM
LOGIC
INPUT
R
L
1k
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
IN
NC
V
OUT
V+
V+
C
L
35pF
+3V
COM
MAX4599
Figure 3. Break-Before-Make Interval