Datasheet

MAX4571–MAX4574
Serially Controlled, Clickless
Audio/Video Switches
_______________________________________________________________________________________ 5
pF5C
IN
Input Capacitance
V0.2V
HYST
Input Hysteresis
UNITSMIN TYP MAXCONDITIONSSYMBOLPARAMETER
µA-1 0.01 1Digital inputs = 0 or V+I
LEAK
Input Leakage Current
V+ = 3V
V+ = 3V 0.6
2
V
3V+ = 5V
V
IH
Input High Voltage
V
0.8V+ = 5V
V
IL
Input Low Voltage
ns
20 +
300
0.1C
b
(Note 11)t
F
SCL/SDA Fall Time
ns
20 +
300
0.1C
b
(Note 11)t
R
SCL/SDA Rise Time
µs0.6t
HIGH
Clock High Period
µs1.3t
LOW
Clock Low Period
ns100t
SU:DAT
Data Setup Time
µs0 0.9t
HD:DAT
Data Hold Time
µs0.6t
HD:STA
START Condition Hold Time
µs1.3t
BUF
Bus Free Time between Stop
and Start Condition
kHzDC 400f
SCL
SCL Clock Frequency
V
V+
- 0.5
I
SOURCE
= 0.5mAV
OH
DOUT Output High Voltage
ns0t
DH
DIN to SCLK Hold
MHzDC 2.1f
OP
Operating Frequency
ns100t
DS
DIN to SCLK Setup
ns20 200C
LOAD
= 50pFt
DO
SCLK Fall to Output Data Valid
I/O INTERFACE CHARACTERISTICS
(V+ = +2.7V to +5.25V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
V0.4I
SINK
= 6mAV
OL
Output Low Voltage
ns100t
CSS
CS to SCLK Rise Setup
µs2t
R
Rise Time (SCLK, DIN, CS)
ns0t
CSH
CS to SCLK Rise Hold
ns200t
CL
SCLK Pulse Width Low
µs2t
F
Fall Time (SCLK, DIN, CS)
µs0.6t
SU:STO
STOP Condition Setup Time
ns200t
CSW
CS High Pulse Width
ns200t
CH
SCLK Pulse Width High
DIGITAL INPUTS (SCLK, DIN, CS, SCL, SDA, A0, A1)
DIGITAL OUTPUTS (DOUT, SDA)
2-WIRE INTERFACE TIMING (Figure 3)
3-WIRE TIMING (Figure 5)